AD650KP Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге

Компоненты Описание

Список матч

AD650KP

Voltage-to-Frequency and Frequency-to-Voltage Converter

Analog Devices 

AD650

HIGH FREQUENCY OPERATION

Proper RF techniques must be observed when operating the

AD650 at or near its maximum frequency of 1 MHz. Lead

lengths must be kept as short as possible, especially on the one

shot and integration capacitors, and at the integrator summing

junction. In addition, at maximum output frequencies above

500 kHz, a 3.6 kΩ pull-down resistor from Pin 1 to –VS is re-

quired (see Figure 7). The additional current drawn through the

pull-down resistor reduces the op amp’s output impedance and

improves its transient response.

Figure 5. Connection Diagram for V/F Conversion,

Negative Input Voltage

F/V CONVERSION

The AD650 also makes a very linear frequency-to-voltage con-

verter. Figure 6 shows the connection diagram for F/V conver-

sion with TTL input logic levels. Each time the input signal

crosses the comparator threshold going negative, the one shot is

activated and switches 1 mA into the integrator input for a mea-

sured time period (determined by COS). As the frequency in-

creases, the amount of charge injected into the integration

capacitor increase proportionately. The voltage across the in-

tegration capacitor is stabilized when the leakage current

through R1 and R3 equals the average current being switched

into the integrator. The net result of these two effects is an aver-

age output voltage which is proportional to the input frequency.

Optimum performance can be obtained by selecting compo-

nents using the same guidelines and equations listed in the V/F

Conversion section.

The circuit of Figure 6 can be biased to accommodate almost

any input signal waveform. With a TTL input, the 1000 pF

coupling capacitor and 2.2 kΩ resistor creates a clean negative

spike that triggers the one shot on negative going edges. For

input signals with slower edges, a larger capacitor and/or resistor

may be used as long as the comparator is never exposed to a

voltage lower than –0.6 V for longer than the one shot time

period. If this happens, the one shot will trigger itself more than

once per cycle, creating discontinuities in the F/V transfer func-

tion. An input pulse greater than 100 ns but less than 0.3 × tOS

is recommended (tOS is defined by equation 1 in the circuit op-

eration section, unipolar configuration).

Figure 6. Connection Diagram for F/V Conversion

Figure 7. 1 MHz V/F Connection Diagram

DECOUPLING AND GROUNDING

It is good engineering practice to use bypass capacitors on the

supply-voltage pins and to insert small-valued resistors (10 Ω to

100 Ω) in the supply lines to provide a measure of decoupling

between the various circuits in a system. Ceramic capacitors of

0.1 µF to 1.0 µF should be applied between the supply-voltage

pins and analog signal ground for proper bypassing on the

AD650.

In addition, a larger board level decoupling capacitor of 1 µF to

10 µF should be located relatively close to the AD650 on each

power supply line. Such precautions are imperative in high reso-

lution data acquisition applications where one expects to exploit

the full linearity and dynamic range of the AD650. Although

some types of circuits may operate satisfactorily with power sup-

ply decoupling at only one location on each circuit board, such

practice is strongly discouraged in high accuracy analog design.

Separate digital and analog grounds are provided on the

AD650. The emitter of the open collector frequency output

transistor is the only node returned to the digital ground. All

other signals are referred to analog ground. The purpose of the

two separate grounds is to allow isolation between the high pre-

cision analog signals and the digital section of the circuitry. As

much as several hundred millivolts of noise can be tolerated on

the digital ground without affecting the accuracy of the VFC.

Such ground noise is inevitable when switching the large cur-

rents associated with the frequency output signal.

At 1 MHz full scale, it is necessary to use a pull-up resistor of

about 500 Ω in order to get the rise time fast enough to provide

well defined output pulses. This means that from a 5 volt logic

supply, for example, the open collector output will draw 10 mA.

This much current being switched will surely cause ringing on

long ground runs due to the self inductance of the wires. For in-

stance, #20 gauge wire has an inductance of about 20 nH per

inch; a current of 10 mA being switched in 50 ns at the end of

–6–

REV. A

Share Link: