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ZR36015 Просмотр технического описания (PDF) - Unspecified

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ZR36015
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ZR36015 Datasheet PDF : 27 Pages
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PRELIMINARY
ZR36015
HEN
PXDATA Bus
Write to Strip Buffer
Read From Strip Buffer
DSYNC/ISYNC
NAX
Delay to Memory Write1
PAX
PAX
PAX
Check if all contents of the coder
side buffer have been read out.
Check if all contents of the pixel
side buffer have been entered.
The pixel side buffer is
monitored as required3
1. See table TBD for “Delay to Memory Write”.
2. The “Buffer Selection Point” happens at the completion of writing a strip (???? line), and indicates
when the ZR36015 switches strip buffer sides to read this new strip.
3. When a complete strip has been written, then the 1st DSYNC for this strip will be asserted (assuming
that STOP is not active).
Figure 12. Example of Double-Sided Buffer Selection Timing - In Encoding (No CBSY)
Buffer
selection
point2
Example #2: Short CBSY
Figure 13 shows an example in encoding mode, where the CBSY is issued for a short period (i.e., CBSY becomes inactive before
the beginning of input for the next strip).
1. HEN goes HIGH, indicating the start of the last line of a strip. The ZR36015 begins to count HDelay in order to ingnore the first
HDelay pixels of the line.
2. The ZR36015 finishes counting HDelay; data for Strip Buffer A’B’ starts to be loaded from the Pixel bus.
3. DSYNC active indicates that data for Strip Buffer AB (previously loaded) continues to be unloaded to the Coder Bus.
4. The writing of a strip to the A’B’ side of the Strip Buffer is complete. At this time the ZR36015 checks to see if the datat from AB
has been unloaded. In example 2, AB is still in the process of being unloaded, so the CBSY signal is asserted to indicate the the
ZR36015 is not ready to accept more input data from the Pixel side.
Readout of data from the AB side of the strip buffer is complete. Now two things happen. First, the ZR36015 detects that data is
already availiable in the A’B’ side of the Strip Buffer, and so it continues to assert DSYNCs, indicataing that the A’B’ side is now being
unloaded to the Coder Bus. Second, the CBSY signal becomes inactive, indicating that the AB side of the strip buffer is now empty
and that data from the Pixel Bus can be loaded into the AB side.
HEN
PXDATA Bus
Write to Strip Buffer
Read From Strip Buffer
CBSY
NAX
PAX
PAX
Check if all contents of the coder
side buffer have been read out.
Buffer selection point
PAX
The coder side buffer is
monitored as required
Check if all contents of the pixel
side buffer have been entered.
DSYNC
1. When CBSY is outputted at the timing as shown above (completed within one line), the following oine is not ignored.
2. The timing of CBSY when the line is ignored is as shown below.
Figure 13. Example of Double-Sided Buffer Selection Timing - In Encoding (Short CBSY)
Example #3: CBSY active when HDelay + HWidth is set to the maximum period of HEN
Figure 14 shows an example in encoding mode, where the HDelay + HWidth is set to the maximum perion of HEN. Because of this,
the CBSY can become active after the HEN for the 1st line of the next strip becomes active.
1. HEN goes HIGH, (indicating the start of the last line of a strip. The ZR36015 begins to count HDelay in order to ingnore the first
HDelay pixels of the line.
12

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