CDB42406 Просмотр технического описания (PDF) - Cirrus Logic

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CDB42406

Evaluation Board For CS42406

Cirrus Logic 

CDB42406

1.7.2 Digital Loopback (Setup 3 - Setup 6)

There are 4 different setup options for routing MCLK, LRCK and SCLK for digital loop-

back. These setup configurations allow analog input/output analysis without the need for

a digital signal analyzer/source. These options also allow the user to choose between 2

different MCLK and 2 different subclock sources for the ADC/DAC.

1.7.2a Setup 3

Using the on-board crystal oscillator, AUDIO MCLK, the CS42406 ADC masters the sub-

clocks and data for the DAC. For implementation of this setup option, set DIP switch S4

(SW[3:0]) to ‘0011’b.

AU DIO

MCLK

CS8416

RMCK

OMCK

OLR CK/

OSCLK

SDOUT

C S 84 0 6

OMC K

ILRC K/

ISC LK

S DIN

CS42406

MCLK

D AC_LRCK/

D AC_SCLK

D AC_SDINx

ADC _LRC K/

ADC _S CLK

ADC_SD OUT

DSP I/O

HDR

DSP _MC LK

DS P_DAC_LRCK /

DS P_DAC_SC LK

DSP_SD INx

DS P_ADC_LRCK /

DS P_ADC_SC LK

DSP _SDO UT

Figure 4. Digital Loopback - Setup 3

8

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