M65761FP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

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M65761FP

QM-CODER

MITSUBISHI ELECTRIC  

MITSUBISHI ICs (LSI)

M65761FP

QM-CODER

11. REGISTER CONFIGURATION

11. 1 List of registers

Address

Register Name

R/W

Description

0

System setting

• LSI H/W reset

• Coding/decoding/image data through mode selection

• Context selection(internal context/external context)

R/W • Byte swap ON/OFF of coded/image data on host bus

• Bit swap ON/OFF of coded/image data on host bus

• Image data I/O I/F(parallel I/F,serial I/F)

• Image data bus bit width selection(32bits/16bits)

1

Parameter setting

• Template selection (2-line/3-line template)

R/W

• Setting of AT pixel position (up to 127)(IF O is set,AT becomes

non-existent (default position))

• Latch input/through input selection in external context input mode

2

Command

• Context table RAM initialization command

• Coding (decoding,through) start/end command

W

• Start/stop command for R/W of context table RAM

• Selection of temporary stop and terminating end

2

Status

• Processing status (in process/end of processing)

• Coded data read/write ready (ready/busy)

R

• Marker code detection (SDNORM,SDRST,ABORT,others)

• Interrupt request status

• SC counter over flow

• Processing mode (stop temporary/terminating end)

• Interrupt enable setting correspondence to each of bits positions of

3

Interrupt enable setting R/W

status register

4,5 Pixel count setting

R/W • Setting the number of pixels on one line (in multiples of 16or32,up to

10240 pixels)

6,7 Line count setting

R/W • Setting the number of lines to be coded/decoded(up to 65535 lines)

8,9 Processed line count R

• Setting the number of coded/decoded lines (up to 65535 lines)

A,B Data write buffer

• Buffer for writing coded data/image data/context table RAM data from

W

MPU into LSI (DMA transferable)(RAM address is automatically

incremented each time data is written.)

A,B Data read buffer

• Buffer for reading coded data/image data/context table RAM data from

R

LSI into MPU (DMA transferable)(RAM address is automatically

incremented each time data is read).

C

Marker code setting

W

• Setting a terminal marker code in coding (SDNORM/SDRST)

C

Marker code read

R

• Reading a marker code in decoding (SDNORM,SDRST,ABORT,others)

D

Scaling

• Reduction in coding (1/2 reduction in horizontal and vertical directions,

horizontal OR processing)

• Magnification during decoding ( × 2 lengthwise and width)

R/W • Select throwing away the leading 1byte of the coded data read when

decoding

• Selecting the typical prediction

• Selection of prohibiting line memory initialization

Notes:When the 8bit bus is used for the data read/write buffer,use Address A only.

Incase of the 16-bit buffer,only the word access is possible.

(The byte access is not possible).

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