RV5C386A-E2 Просмотр технического описания (PDF) - RICOH Co.,Ltd.
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RV5C386A-E2 Datasheet PDF : 42 Pages
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RV5C386A
PRELIMINARY
13.2. Register Settings
13.2.1. Control Register 1 (ADDRESS Eh)
D7
D6
D5
D4
D3 D2 D1 D0
WALE DALE /12⋅24 SCRATCH3 TEST CT2 CT1 CT0 (For Writing)
WALE DALE /12⋅24 SCRATCH3 TEST CT2 CT1 CT0 (For Reading)
0
0
0
0
0
0
0
0 Default Settings *)
*) Default settings: Default value means read/written values when the XSTP bit is set to “1” due to power-on
from 0 volts or supply voltage drop.
(1) WALE, DALE
Alarm_W Enable Bit, Alarm_D Enable Bit
WALE,DALE
Description
0
Disabling the alarm interrupt circuit (under the control of the settings (Default)
of the Alarm_W registers and the Alarm_D registers).
1
Enabling the alarm interrupt circuit (under the control of the settings
of the Alarm_W registers and the Alarm_D registers)
(2) /12⋅24
12-/24-hour Mode Selection Bit
/12⋅24
Description
0
Selecting the 12-hour mode with a.m. and p.m. indications.
(Default)
1
Selecting the 24-hour mode
Setting the /12 ⋅ 24 bit to 0 and 1 specifies the 12-hour mode and the 24-hour mode, respectively.
24-hour mode
12-hour mode
24-hour mode
00
12 (AM12)
12
01
01 (AM 1)
13
02
02 (AM 2)
14
03
03 (AM 3)
15
04
04 (AM 4)
16
05
05 (AM 5)
17
06
06 (AM 6)
18
07
07 (AM 7)
19
08
08 (AM 8)
20
09
09 (AM 9)
21
10
10 (AM10)
22
11
11 (AM11)
23
Setting the /12⋅24 bit should precede writing time data
12-hour mode
32 (PM12)
21 (PM 1)
22 (PM 2)
23 (PM 3)
24 (PM 4)
25 (PM 5)
26 (PM 6)
27 (PM 7)
28 (PM 8)
29 (PM 9)
30 (PM10)
31 (PM11)
(3) SCRATCH3 Scratch Bit 3
SCRATCH3
Description
0
(Default)
1
The SCRATCH3 bit is intended for scratching and accepts the reading and writing of 0 and 1. The SCRATCH3
bit will be set to 0 when the XSTP bit is set to 1 in the Control Register 2.
(4) TEST
Test Bit
TEST
Description
0
Normal operation mode.
1
Test mode.
The TEST bit is used only for testing in the factory and should normally be set to 0.
(Default)
12345
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