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ZR36016

INTEGRATED COLOR SPACE / RASTER-TO-BLOCK CONVERTER

Zoran Corporation 

Integrated Color Space / Raster-To-Block Converter

During expansion FBSY goes high when the first DSYNC pulse

from the ZR36050 is detected and goes low after the active

window has been processed. WINDOW is active whenever data

in the active window is being output, and when it is not active the

PXIN image data is passed through to the PXOUT bus. These

are illustrated below.

Input GO or START

VIN

LINE

A

NAY

EOS

Compression

FSBY

CBSY

WINDOW

Expansion

FSBY

First DSYNC

CBSY

WINDOW

PAY

Figure 23. GO/STOP and START Timing

for Compression and Expansion

CBSY Timing

Codec busy, CBSY, is a signal output from the ZR36016

showing the state of transfers between the ZR36016 strip

buffers and the ZR36050. It indicates that the strip buffer on the

ZR36050 side is still busy when the strip buffer on the pixel side

becomes available and the buffers can not be exchanged. If the

buffer exchange does not occur before the rising edge of HIN,

the data of that line will be lost during compression, and during

expansion the line will not contain expanded data and PXIN data

will be substituted.

If CBSY becomes active but is then cleared when the ZR36050-

side strip buffer becomes ready, normal operation will continue

on the next rising edge of HIN. However if PAX < 24 then there

must be 16 clock periods of PXCLK before the rising edge of HIN

to insure normal operation.

CBSY Timing On Compression

After the last pixel of the PAX portion of the last buffer line has

been input on PXIN and sent to the strip buffer, a check is made

to see that the previous buffer has been completely read out to

the ZR36050. If it has not, then CBSY is asserted. Figure 24

shows a case where the previous buffer is ready immediately

and CBSY is not asserted.

HIN

Last line of strip being input

PXIN

NAX

PAX

Delay of internal processing

Check if all contents of coder side

buffer have been read out

MWE

Check if all contents of pixel

Buffer

side buffer have been entered

selection point

MOE

pixel side buffer is always monitored

DSYNC

CBSY

Figure 24. Normal Compression Operation when

CBSY is Not Asserted

Figure 25 shows the condition where CBSY is asserted but the

line is not ignored.

HIN

Last line of strip being input

PXIN

NAX

PAX

Delay of internal processing

MWE

MOE

Check if all contents of pixel

side buffer have been entered

Check if all contents of coder side

buffer have been read out

Buffer

selection point

DSYNC

CBSY

Pixel side buffer is always monitored

Delay of internal processing

Figure 25. Compression Operation When CBSY is Asserted

but the Line is not Ignored

Figure 26 shows the case where CBSY is asserted and a line is

ignored. CBSY becomes active on line 8n. Processing of line 8n

is completed in the ZR36016 and line 8n+1 will be ignored. At

the next rising edge of HIN, if CBSY is not asserted, the process-

ing is restarted (with line 8n+2).

HIN

PXIN

MWE

MOE

NAX

8n

PAX

PAX

Check if all contents of pixel

side buffer have been entered

8n+1

8n+2

NAX PAX

Check if all contents of coder side

buffer have been read out

Buffer selection point

DSYNC

CBSY

Pixel side buffer is always monitored

Delay of internal processing

Figure 26. Compression Operation when CBSY is

Asserted and A Line is Ignored

CBSY Timing On Expansion

CBSY is asserted immediately after GO/STOP is set and

CMPR = 0. It remains asserted while the ZR36050 is filling the

first buffer and PXIN data is being output on the PXOUT bus.

Normal operation then proceeds as shown in Figure 27 where

CBSY is not asserted.

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