IDT72132 Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72132

CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 4096 x 9

Integrated Device Technology 

IDT72132, IDT72142

CMOS SERIAL-TO-PARALLEL FIFO 2048 x 9 AND 4096 x 9

0

SICP

SIX

SI

t SIS

t SIX

t SIH

NOTE:

1. Input bits are numbered 0 to n-1.

t SICW

tSICW

1

2

1/t SICP

Figure 2. Write Operation

COMMERCIAL TEMPERATURE RANGES

n – 1 (1)

2752 drw 05

R

Q0–8

t RPW

tRLZ

tA

t RC

VALID DATA

tDV

Figure 3. Read Operation

t RR

tRHZ

2752 drw 06

R

OE

Q0–8

tA

tRLZ

t RC

t RR

t OEHZ

DATA 1

TERMINATE READ CYCLE

SECOND READ BY CONTROLLINGOE

tAOE

t OELZ

tDV

DATA 1

Figure 4. Output Enable Timings

2752 drw 07

5.36

6

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