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MPC9658 Просмотр технического описания (PDF) - Motorola => Freescale

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MPC9658
Motorola
Motorola => Freescale Motorola
MPC9658 Datasheet PDF : 12 Pages
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Freescale Semiconductor, Inc.
MPC9658
Table 1. PIN CONFIGURATION
Pin
I/O
Type
PCLK, PCLK Input
LVPECL
FB_IN
Input
LVCMOS
VCO_SEL
Input
LVCMOS
BYPASS
Input
LVCMOS
PLL_EN
Input
LVCMOS
MR/OE
Q0-9
Input
Output
LVCMOS
LVCMOS
QFB
Output LVCMOS
GND
Supply Ground
VCC_PLL
Supply VCC
VCC
Supply VCC
Function
PECL reference clock signal
PLL feedback signal input, connect to QFB
Operating frequency range select
PLL and output divider bypass select
PLL enable/disable
Output enable/disable (high-impedance tristate) and device reset
Clock outputs
Clock output for PLL feedback, connect to FB_IN
Negative power supply (GND)
PLL positive power supply (analog power supply). It is recommended to use an external RC filter
for the analog power supply pin VCC_PLL. Please see applications section for details.
Positive power supply for I/O and core. All VCC pins must be connected to the positive power
supply for correct operation
Table 2. FUNCTION TABLE
Control
PLL_EN
Default
0
1
1 Test mode with PLL bypassed. The reference clock (PCLK) Selects the VCO outputa
is substituted for the internal VCO output. MPC9658 is fully
static and no minimum frequency limit applies. All PLL
related AC characteristics are not applicable.
BYPASS
1 Test mode with PLL and output dividers bypassed. The
Selects the output dividers.
reference clock (PCLK) is directly routed to the outputs.
MPC9658 is fully static and no minimum frequency limit
applies. All PLL related AC characteristics are not
applicable.
VCO_SEL
1
VCO ÷ 1 (High frequency range). fREF = fQ0-9 = 2 fVCO VCO ÷ 2 (Low frequency range). fREF = fQ0-9 = 4 fVCO
MR/OE
0 Outputs enabled (active)
a. PLL operation requires BYPASS=1 and PLL_EN=1.
Outputs disabled (high-impedance state) and reset of
the device. During reset the PLL feedback loop is open.
The VCO is tied to its lowest frequency. The length of
the reset pulse should be greater than one reference
clock cycle (PCLK).
Table 3. ABSOLUTE MAXIMUM RATINGSa
Symbol
Characteristics
Min
Max
Unit
Condition
VCC
Supply Voltage
-0.3
3.9
V
VIN
DC Input Voltage
-0.3
VCC+0.3
V
VOUT DC Output Voltage
-0.3
VCC+0.3
V
IIN
DC Input Current
±20
mA
IOUT DC Output Current
±50
mA
TS
Storage Temperature
-65
125
°C
a. Absolute maximum continuous ratings are those maximum values beyond which damage to the device may occur. Exposure to these conditions
or conditions beyond those indicated may adversely affect device reliability. Functional operation at absolute-maximum-rated conditions is not
implied.
TIMING SOLUTIONS
For More Informa3tion On This Product,
Go to: www.freescale.com
MOTOROLA

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