M65762FP Просмотр технического описания (PDF) - MITSUBISHI ELECTRIC

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M65762FP

QM-CODER

MITSUBISHI ELECTRIC  

MITSUBISHI SEMICONDUCTOR (LSI)

M65762FP

QM-CODER

Specifications of Coding Functions

(1) Coding algorithm

• QM-Coder (JBIG standard arithmetic coding system)

(2) Context

a) Template model

• 2- or 3-line of 10 pixel template (See Figure 1.)

(Conforming to the template for JBIG minimum resolution)

(Note) The coding efficiency of the 3-line template is better

than that of 2-line template by several %.

b) Adaptive template (AT)

• It is possible to move up to 127 pixels on the coding line.

(AT position is indicated by MPU.)

(Note) AT is available to improve the coding efficiency for

dither image.

• Even in the middle of coding/decoding , the position of AT

line can be changed for a line (ATmove)

(Note) When the position the AT pixel of is changed, the

template model cannot be changed concurrently.

(3) Typical Prediction

XXX

XXXXA

XX ?

X XXXXA

XXXX ?

Figure 1 Template (X, A)

(Upper: 3 lines, Lower: 2 lines)

XXX

XXXX

A

XX?

MAX127

XXXXX

A

XX X X ?

MAX127

Figure 2. Adaptive Template (A)

• Agreement with the typical prediction of the minimum

resolution of JBIG.

The psedo-pixel (SLNTP) is generated by the symbol LNTP

which shows whether the coding/decoding process lines

agree with the immediately preceding line. If they agree, the

pesudo-pixel only is coded. This makes it possible to shorten

the time of process and rejection of the code data.

SLNTPy = !(LNTPy + LNTPy-1) (where: y indicates a line

No., y = 1 indicates that lines do not match each other, and

initial value LNTP for head line is given with y - 1 = 1)

(4) Coding data format

• The stripe data entity (SDE = stripe coded data with byte

stuffing (PSCD) + end marker (SDNORM/SDRST)).

Performs coding and decoding of one stripe (See Attached

Figure A.1.)

In the case of multi-striped (multi-stripes), can be supported

by activation for each stripe.

(5) Marker code

• Supports the SDE end marker (During coding, the marker

code previously set in the register is outputted. During

decoding, the marker code byte detected by requesting on

interrupt to MPU when the maker is detected is read out of

the register.)

(6) Estimation of coding/decoding speed

Figure 3 compares the estimation of coding/decoding speed

between the M65762FP and the existing product type

(M65760/1FP). Polygonal lines in the diagram are processing

speeds of images theoretically generated assuming the

unmatched estimation ratio as a parameter. In addition, ,

indicate processing speeds of real image (without TP

function).

As shown in this diagram, the M65762FP has been largely

improved in the processing speed compared with existing

product types. If the compression ratio is reduced, the

reduction ratio of processing speed is moderated.

When a theoretical image is used to compare processing

speeds in the worst case, the processing speed of existing

product type is about 9.4M pixels/sec (1/compression ratio is

about 1), while the processing speed of the M65762FP is

about 27.5M pixels/sec (1/compression ratio 0.9) for coding

and is about 31.2M pixels/sec (1/compression ratio 0.75) for

decoding.

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