6V62160E Просмотр технического описания (PDF) - LAPIS Semiconductor Co., Ltd.

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6V62160E

4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM

LAPIS Semiconductor Co., Ltd. 

FEDD56V62160E-07

MD56V62160E

Bank Interleave Page Write Cycle @CAS Latency = 2, Burst Length  4

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

CLK

CKE

High

CS

RAS

CAS

ADDR RAa

CAa

RBb

CBb

A12,

A13

A10

RAa

RBb

CAc

CBd

DQ

DAa0 DAa1 DAa2 DAa3 DBb0 DBb1 DBb2 DBb3 DAc0 DAc1 DBd0

WE

UDQM,

LDQM

Row Active

(A-Bank)

Row Active

(B-Bank)

Write Command

(A-Bank)

Write Command

(B-Bank)

Write Command

(B-Bank)

Write Command

(A-Bank)

Precharge Command

(Both Bank)

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