6V62160E Просмотр технического описания (PDF) - LAPIS Semiconductor Co., Ltd.

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6V62160E

4-Bank x 1,048,576-Word x 16-Bit SYNCHRONOUS DYNAMIC RAM

LAPIS Semiconductor Co., Ltd. 

FEDD56V62160E-07

MD56V62160E

Burst Read & Single Write Cycle (Same Bank) @CAS Latency  2, Burst Length = 4

0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19

CLK

CKE

CS

RAS

tRCD

CAS

ADDR

A12,

A13

Ra

Ca0

BS

BS

Cb0

Cc0

BS

BS

A10

Ra

tOH

Note 1

DQ

Qa0 Qa1 Qa2 Qa3

Db0

Qc0 Qc1 Qc2 Qc3

tAC

tOH

WE

UDQM,

LDQM

Row Active

Read Command

Write Command

Read Command

Precharge Command

*Note: 1. If you set A9 to high during mode register set cycle, the write burst length is set to 1.

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