GF9101 Просмотр технического описания (PDF) - Unspecified
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GF9101 Datasheet PDF : 23 Pages
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TABLE 9: Configuration Word for a 24-tap Symmetric Filter
BIT
CONFIG.
NO.
WORD
DESCRIPTION
0
1
3Data A and B are both signed data
1
1
2
0
One register delay
3
0
4
0
24-tap filter, connect the outputs of
DATA_A_OUT to the inputs of DATA_B_IN.
5
X
Depending on the loading mode
6
X
See Table 1
NOTE
3. Bits 0 and 1 should have the same value for a 23 or 24 tap filter
The filter coefficients are shown in Figure 10. The timing is verysimilar to that of the even-symmetric case.
C11 C11
C10
C10
C9
C0
C3 C4 C5
C2
C1
C6
C8
C7
A17
A18
A16
A19
A15
C9
C5 C4 C3
C0 (a) Filter Coefficients Cn
C8
C6
C7
A7
A8
A6
A9
A5
C2
C1
(b) Input Data An
A24
A23
A20
A21
A22
A14
A13
A10
A11
A12
A4
A0
A3
A1
A2
Fig. 10 Input Data An and Coefficients Cn
ASYMMETRIC FILTER
The GF9101 can be used as a 24-tap asymmetric filter by
configuring it the same way as the even-symmetric case.
The difference is in the memory locations since the
asymmetric case uses 24 different coefficients, i.e. two sets
of filter coefficients. The filter coefficients and the memory
locations are shown in Table 10.
The timing diagram is shown in Figure 11. The data flow
diagrams are shown in Figures 11a and 11b.
TABLE 10:Internal RAM Address & Contents for a 24-tap
Asymmetric Filter
COEF_ADDR (6-0)
MEMORY CONTENTS
00H
First set of 12 coefficients, C0 —> C11
01H
Second set of 12 coefficients, C23 —> C12
11
520 - 64 - 7
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