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CY62146EV30LL(2009) Просмотр технического описания (PDF) - Cypress Semiconductor

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CY62146EV30LL
(Rev.:2009)
Cypress
Cypress Semiconductor Cypress
CY62146EV30LL Datasheet PDF : 13 Pages
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CY62146EV30 MoBL®
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................ –65°C to + 150°C
Ambient Temperature with
Power Applied .......................................... –55°C to + 125°C
Supply Voltage to Ground
Potential .............................–0.3V to + 3.9V (VCCmax + 0.3V)
DC Voltage Applied to Outputs
in High-Z State [4, 5]................ –0.3V to 3.9V (VCCmax + 0.3V)
DC Input Voltage [4, 5] ........... –0.3V to 3.9V (VCC max + 0.3V)
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage .......................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-up Current...................................................... >200 mA
Operating Range
Device
CY62146EV30
Range
Industrial/
Auto-A
Ambient
Temperature
VCC [6]
–40°C to +85°C 2.2V to 3.6V
Electrical Characteristics
Over the Operating Range
Parameter
Description
VOH
Output HIGH Voltage
VOL
Output LOW Voltage
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
IIX
Input Leakage Current
IOZ
Output Leakage Current
ICC
VCC Operating Supply Current
ISB1
Automatic CE Power down
Current — CMOS Inputs
ISB2 [7]
Automatic CE Power down
Current — CMOS Inputs
Test Conditions
IOH = –0.1 mA
IOH = –1.0 mA, VCC > 2.70V
IOL = 0.1 mA
IOL = 2.1 mA, VCC > 2.70V
VCC = 2.2V to 2.7V
VCC= 2.7V to 3.6V
VCC = 2.2V to 2.7V
VCC= 2.7V to 3.6V
GND < VI < VCC
GND < VO < VCC, Output Disabled
f = fmax = 1/tRC
f = 1 MHz
VCC = VCC(max),
IOUT = 0 mA
CMOS levels
CE > VCC0.2V,
VIN > VCC–0.2V or VIN < 0.2V
f = fmax (Address and Data Only),
f = 0 (OE, BHE, BLE and WE), VCC = 3.60V
CE > VCC – 0.2V,
VIN > VCC – 0.2V or VIN < 0.2V,
f = 0, VCC = 3.60V
45 ns (Ind’l/Auto-A)
Min Typ [3] Max Unit
2.0
V
2.4
V
0.4
V
0.4
V
1.8
2.2
–0.3
VCC + 0.3 V
VCC + 0.3 V
0.6
V
–0.3
0.8
V
–1
+1
μA
–1
+1
μA
15
20
mA
2
2.5
1
7
μA
1
7
μA
Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter
Description
CIN
COUT
Input Capacitance
Output Capacitance
Test Conditions
TA = 25°C, f = 1 MHz, VCC = VCC(typ)
Max
Unit
10
pF
10
pF
Notes
4. VIL(min) = –2.0V for pulse durations less than 20 ns.
5. VIH(max) = VCC + 0.75V for pulse durations less than 20 ns.
6. Full device AC operation assumes a minimum of 100 μs ramp time from 0 to Vcc(min) and 200 μs wait time after Vcc stabilization.
7. Only chip enable (CE) and byte enables (BHE and BLE) need to be tied to CMOS levels to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
Document Number: 38-05567 Rev. *D
Page 3 of 13
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