ZR36016 Просмотр технического описания (PDF) - Zoran Corporation
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ZR36016 Datasheet PDF : 36 Pages
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Integrated Color Space / Raster-To-Block Converter
Setup Register 1 (Continued)
Bit 2 SBFL: Image format conversion filter.
Initial Value = 0.
0= Selects simple decimation or interpolation without
filtering.
1= Selects decimation or interpolation of color compo-
nents with filter processing.
This bit controls filtering in Format Converter #1.
Bit 3 DSFL: PXIN/OUT bus data image format conver-
sion filter.
Initial Value = 0.
0= Selects simple decimation or interpolation without
filtering.
1= Selects decimation or interpolation of color compo-
nents with filter processing.
This bit controls filtering in Format Converter #2.
Bit 4 HRFL: Half-size horizontal decimation or interpola-
tion filter.
Initial Value = 0.
0= Selects simple half-size horizontal decimation or in-
terpolation without filtering.
1= Selects decimation or interpolation with filtering.
Must be used only with HORZ = 1.
Bit 5 HORZ: Half-size horizontal decimation or
interpolation.
Initial Value = 0.
0= Selects no horizontal decimation nor interpolation.
1= Selects half-size horizontal decimation on compres-
sion, and interpolation on expansion. The
decimated data stream is loaded in the strip buffer
on compression, and the data before interpolation
is loaded on expansion. The decimation and inter-
polation are performed on Y, Cr and Cb, or on Y
only, depending on the MODE field.
Bit 6 VERT: Half-size vertical decimation or interpolation.
Initial Value = 0.
0= Selects no vertical decimation nor interpolation.
1= Selects half-size vertical decimation (by line drop-
ping) in compression or interpolation by line
replication in expansion. The decimated data
stream is loaded in the strip buffer on compression,
and the data before interpolation is loaded on ex-
pansion. The lines dropped in decimation are the
second, fourth,… lines of the active window. This bit
does not apply to the 4:1:1(H2V2) format.
Bit 7 CKRT: Ratio of PXCLK to SYSCLK frequency, with
half-size horizontal decimation/interpolation.
Initial Value = 0.
0= Selects normal PXCLK to SYSCLK frequency ratio
when HORZ = 1.
1= Selects slow SYSCLK (doubles the PXCLK to SY-
SCLK frequency ratio) when HORZ = 1.
This bit selects the PXCLK to SYSCLK frequency
ratio, when HORZ = 1 (horizontal half-size mode). It
optionally allows the SYSCLK rate to be halved rel-
ative to its rate with full horizontal size. See Table 8.
Setup Register 2
Read/Write Indirect address: 0x01
Initial Value 0x00
7
6
5
4
3
2
1
0
– SYEN –
–
– CCIR SIGN YMCS
Bit 0 YMCS: RGB or YeMaCy selection.
Initial Value = 0.
0= RGB.
1= YeMaCy. The ZR36016 treats RGB as YeMaCy
when the image format on the PXIN/PXOUT buses
are RGB in the MODE field.
Bit 1 SIGN: Signed values of Cr and Cb.
Initial Value = 0.
Selects the sign convention of Cr and Cb on the
PXIN bus input and the output on the PXOUT bus.
0= Offset binary (unsigned).
1= 2's complement signed.
The data transfers with the ZR36050 are always
unsigned. This bit is not used when MODE = 0x19
(4:4:4:4).
Bit 2
CCIR: CCIR signal level selection. Initial Value = 0.
When the color space conversion is done, the signal
levels can be as specified in CCIR601 or full scale.
This bit is not used when MODE = 0x19 (4:4:4:4).
0= 8 bits full scale.
1= CCIR R601.2 standard levels.
Bit 3-5 Reserved.
Bit 6 SYEN: Function selection for PXOE.
Initial Value = 0.
0= Tri-stating of PXOUT bus, HOUT and VOUT are
controlled by PXOE.
1= Only the PXOUT bus is three-stated by PXOE.
Bit 7 Reserved.
The NAX, PAX, NAY and PAY registers define the offset and
dimensions of the active area. See also Figure 4.
Window Area Register NAX-Lo
Read/Write Indirect address: 0x02
Initial Value 0x00
7
6
5
4
3
2
1
0
NAX[7:0]
Bits 0-7 NAX(7:0): The number of pixels from the rising
edge of HIN to the starting point of the active
window area (X-axis offset). Lower 8 bits.
Initial Value = 0.
6
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