W83194BR-703 Просмотр технического описания (PDF) - Winbond
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W83194BR-703 Datasheet PDF : 28 Pages
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W83194BR-703/W83194BG-703
7.3 Register 2: PCI, ZCLK Control (1 = Enable, 0 = Stopped) (Default: FFh)
BIT
PIN NO PWD
DESCRIPTION
7
-
1 Reserved
6
15
1 PCI_F1 output control
5
14
1 PCI_F0 output control
4
10
1 ZCLK1 output control
3
9
1 ZCLK0 output control
2
23
1 PCI5 output control
1
22
1 PCI4 output control
0
21
1 PCI3 output control
7.4 Register 3: PCI, AGP Control (1 = Enable, 0 = Stopped) (Default: FFh)
BIT
PIN NO PWD
DESCRIPTION
7
20
1 PCI2 output control
6
17
1 PCI1 output control
5
16
1 PCI0 output control
12 _ 48 MHz output selection, 1: 12 MHz (default) 0: 48 MHz.
4 SEL12_48 X
Default value follow hardware trapping data on SEL12_48# pin.
3
47
1 IOAPIC1 output control
2
46
1 IOAPIC0 output control
1
30
1 AGP_1 output control
0
31
1 AGP_0 output control
7.5 Register 4: 48MHz, REF, SRC Control (1 = Enable, 0 = Stopped) (Default: FFh)
BIT
PIN NO PWD
DESCRIPTION
7
26
1 24_48MHz output control
6
27
1 12_48MHz output control
5
-
1 Reserved
4
4
1 REF2 output control
3
3
1 REF1 output control
2
2
1 REF0 output control
1
47,46
1 SRC output control
0
-
1 Reserved
Publication Release Date: Jan. 2006
-9-
Revision 0.8
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