W83194BR-703 Просмотр технического описания (PDF) - Winbond

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W83194BR-703

STEPLESS CLOCK FOR SIS 741 CHIPSET

Winbond 

W83194BR-703/W83194BG-703

7.22 Register 21: Fix Mode Control (Default: 00h)

BIT

NAME PWD

DESCRIPTION

7 TRI-EN

0 Tri-state all output if set 1

6 FIX_ZCLK

5 FIX_PCI

4 FIX_AGP

3 Reserved

ZCLK output frequency select mode

0 (Only valid under FIX_ADDR<2:0> is nonzero)

0: Output frequency according to frequency selection table

1: Output frequency according to FIX frequency table

PCI output frequency select mode

(Only valid under FIX_ADDR<2:0> is nonzero)

0

0: Output frequency according to frequency selection table

1: Output frequency according to FIX frequency table

AGP output frequency select mode

0 (Only valid under FIX_ADDR<2:0> is nonzero)

0: Output frequency according to frequency selection table

1: Output frequency according to FIX frequency table

0 Reserved for test only please don’t modify it.

2 FIX_ADDR<2> 0 Asynchronous ZCLK/AGP/PCI frequency table selection

1 FIX_ADDR<1> 0 FIX_ADDR<2:0>

001: 132 / 66 / 33M

0 FIX_ADDR<0> 0

011: 132 / 88 / 44M

101: 132 / 66 / 33M

111: 132 / 88 / 33M

010:132 / 75.43 / 37.7M

100:176 / 88 / 44M

110:132 / 75.43 / 33M

000: Clock from PLL1

- 17 -

Publication Release Date: Jan. 2006

Revision 0.8

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