W83194BR-703 Просмотр технического описания (PDF) - Winbond

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W83194BR-703

STEPLESS CLOCK FOR SIS 741 CHIPSET

Winbond 

W83194BR-703/W83194BG-703

7. I2C CONTROL AND STATUS REGISTERS

7.1 Register 0: Frequency Select (Default = 20h)

BIT

NAME

PWD

DESCRIPTION

7 SSEL [4]

0

6 SSEL [3]

5 SSEL [2]

4 SSEL [1]

0 Frequency selection by software via I2C

1

0

3 SSEL [0]

0

Enable software table selection FS [4:0].

2 EN_SSEL

0 0 = Hardware table setting (Jump mode).

1 = Software table setting through Bit7~3. (Jump less mode)

Enable spread spectrum mode under clock output.

1 EN_SPSP

0 0 = Spread Spectrum mode disable

1 = Spread Spectrum mode enable

After watchdog timeout

0 EN_SAFE_FREQ 0 0 = Reload the hardware FS [4:0] latched pins setting.

1 = Reload the desirable frequency table selection defined at Reg-5

Bit 4~0.

7.2 Register 1: CPU Control (1 = Enable, 0 = Stopped) (Default: ECh)

BIT

PIN NO PWD

DESCRIPTION

7 Reserved 1 Reserved

6

40

1 CPUT1 output control

5

38,37

1 CPUT0 / C0 output control

4 Reserved X Reserved. Default: 0 (Read only)

3

15

X Power on latched value of FS3 pin. Default: 1 (Read only)

2

14

X Power on latched value of FS2 pin. Default: 1 (Read only)

1

3

X Power on latched value of FS1 pin. Default: 0 (Read only)

0

2

X Power on latched value of FS0 pin. Default: 0 (Read only)

-8-

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