UPD72870AF1 Просмотр технического описания (PDF) - NEC => Renesas Technology

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UPD72870AF1

IEEE1394 1-CHIP OHCI HOST CONTROLLER

NEC => Renesas Technology 

µPD72870A

4. PHY FUNCTION .................................................................................................................................... 33

4.1 Cable Interface ............................................................................................................................... 33

4.1.1 Connections.......................................................................................................................................... 33

4.1.2 Cable Interface Circuit .......................................................................................................................... 34

4.1.3 CPS....................................................................................................................................................... 34

4.1.4 Unused Ports ........................................................................................................................................ 34

4.2 Suspend/Resume........................................................................................................................... 35

4.2.1 Suspend/Resume On Mode (SUS_RESM = 1)..................................................................................... 35

4.2.2 Suspend/Resume Off Mode (SUS_RESM = 0)..................................................................................... 35

4.3 PLL and Crystal Oscillation Circuit.............................................................................................. 36

4.3.1 Crystal Oscillation Circuit...................................................................................................................... 36

4.3.2 PLL ....................................................................................................................................................... 36

4.4 PC0-PC2, CMC................................................................................................................................ 36

4.5 P_RESETB ...................................................................................................................................... 36

4.6 RI0, RI1 ............................................................................................................................................ 36

5. SERIAL ROM INTERFACE .................................................................................................................. 37

5.1 Serial EEPROM Register ............................................................................................................... 37

5.2 Serial EEPROM Register Description .......................................................................................... 37

5.3 Load Control................................................................................................................................... 42

5.4 Programming Sequence Example................................................................................................ 42

6. ELECTRICAL SPECIFICATIONS ......................................................................................................... 44

7. APPLICATION CIRCUIT EXAMPLE.................................................................................................... 47

8. PACKAGE DRAWINGS ........................................................................................................................ 48

Preliminary Data Sheet S14653EJ1V0DS00

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