IDT723613 CMOS CLOCKED FIFO WITH BUS MATCHING AND BYTE SWAPPING
64 x 36
COMMERCIAL TEMPERATURE RANGES
CLKA
CSA
W/RA
MBA
ENA
A0 - A35
tENS
tENH
tDS
tDH
W1
CLKB
tPMF
MBF1
tPMF
CSB
W/RB
SIZ1, SIZ0
ENB
B0 - B35
tENS
tENH
tEN
tMDV
tPMR
tDIS
W1 (Remains valid in Mail1 Register after read)
FIFO Output Register
NOTE:
1. Port-B parity generation off (PGB = LOW).
Figure 13. Timing for Mail1 Register and MBF1 Flag
3145 drw 13
23