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IDT723613L30PQF

CMOS Clocked FIFO With Bus Matching and Byte Swapping 64 x 36

Integrated Device Technology 

IDT723613 CMOS CLOCKED FIFO WITH BUS MATCHING AND BYTE SWAPPING

64 x 36

COMMERCIAL TEMPERATURE RANGES

CLKA

ENA

CLKB

AE

tENS

tENH

(1)

tSKEW2

1

X Long Words in FIFO

2

tPAE

(X+1) Long Words in FIFO

tENS

tPAE

tENH

ENB

3145 drw 11

NOTES:

1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for AE to transition HIGH in the next CLKB cycle. If the time between

the rising CLKA edge and rising CLKB edge is less than tSKEW2, then AE may transition HIGH one CLKB cycle later than shown.

2. FIFO write (CSA = LOW, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = LOW, MBB = LOW).

3. Port B size of long word is selected for the FIFO read by SIZ1 = LOW, SIZ0 = LOW. If port B size is word or byte, tSKEW2 is referenced to the last word

or byte of the long word, respectively.

Figure 11. Timing for AE when the FIFO is Almost Empty

CLKA

ENA

tENS

AF [64-(X+1)] Long Words in FIFO

tENH

tPAF

(1)

tSKEW2

1

(64-X) Long Words in FIFO

2

tPAF

CLKB

ENB

tENS

tENH

3145 drw 12

NOTES:

1. tSKEW2 is the minimum time between a rising CLKA edge and a rising CLKB edge for AF to transition HIGH in the next CLKA cycle. If the time between

the rising CLKA edge and rising CLKB edge is less than tSKEW2, then AF may transition HIGH one CLKB cycle later than shown.

2. FIFO write (CSA = L0W, W/RA = HIGH, MBA = LOW), FIFO read (CSB = LOW, W/RB = LOW, MBB = LOW).

3. Port-B size of long word is selected for FIFO read by SIZ1 = LOW, SIZ0 = LOW. If port B size is word or byte, tSKEW2 is referenced from the last word or

byte read of the long word, respectively.

Figure 12. Timing for AF when the FIFO is Almost Full

22

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