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MAX147ACAP(2001) Просмотр технического описания (PDF) - Maxim Integrated

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MAX147ACAP
(Rev.:2001)
MaximIC
Maxim Integrated MaximIC
MAX147ACAP Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
+2.7V, Low-Power, 8-Channel,
Serial 12-Bit ADCs
ABSOLUTE MAXIMUM RATINGS
VDD to AGND, DGND................................................. -0.3V to 6V
AGND to DGND ...................................................... -0.3V to 0.3V
Continuous Power Dissipation (TA = +70°C)
Plastic DIP (derate 11.11mW/°C above +70°C) ......... 889mW
CH0–CH7, COM to AGND, DGND ............ -0.3V to (VDD + 0.3V)
VREF, REFADJ to AGND ........................... -0.3V to (VDD + 0.3V)
Digital Inputs to DGND .............................................. -0.3V to 6V
SSOP (derate 8.00mW/°C above +70°C) ................... 640mW
CERDIP (derate 11.11mW/°C above +70°C) .............. 889mW
Operating Temperature Ranges
Digital Outputs to DGND ........................... -0.3V to (VDD + 0.3V)
Digital Output Sink Current .................................................25mA
MAX146_C_P/MAX147_C_P .............................. 0°C to +70°C
MAX146_E_P/MAX147_E_P............................ -40°C to +85°C
MAX146_MJP/MAX147_MJP ........................ -55°C to +125°C
Storage Temperature Range ............................ -60°C to +150°C
Lead Temperature (soldering, 10s) ................................ +300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX146); VDD = +2.7V to +5.25V (MAX147); COM = 0; fSCLK = 2.0MHz; external clock (50% duty cycle); 15
clocks/conversion cycle (133ksps); MAX146—4.7µF capacitor at VREF pin; MAX147—external reference, VREF = 2.500 V applied to
VREF pin; TA = TMIN to TMAX; unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
DC ACCURACY (Note 1)
Resolution
Relative Accuracy (Note 2)
MAX14_A
INL MAX14_B
MAX147C
12
Bits
±0.5
±1.0 LSB
±2.0
No Missing Codes
NMC
12
Bits
Differential Nonlinearity
DNL
MAX14_A/MAX14_B
MAX147C
±0.8
±1.0
LSB
Offset Error
Gain Error (Note 3)
Gain Temperature Coefficient
MAX14_A
MAX14_B/MAX147C
±0.5
±0.5
±0.5
±0.25
±3
LSB
±4
±4 LSB
ppm/°C
Channel-to-Channel Offset
Matching
±0.25
LSB
DYNAMIC SPECIFICATIONS (10kHz sine-wave input, 0V to 2.500Vp-p, 133ksps, 2.0MHz external clock, bipolar input mode)
MAX14_A/MAX14_B
Signal-to-Noise + Distortion Ratio SINAD
MAX147C
70
73
dB
73
Total Harmonic Distortion
THD
Up to the 5th
harmonic
MAX14_A/MAX14_B
MAX147C
-88
-80
dB
-88
Spurious-Free Dynamic Range
MAX14_A/MAX14_B
SFDR
MAX147C
80
90
dB
90
Channel-to-Channel Crosstalk
Small-Signal Bandwidth
65kHz, 2.500Vp-p (Note 4)
-3dB rolloff
-85
dB
2.25
MHz
Full-Power Bandwidth
1.0
MHz
CONVERSION RATE
Conversion Time (Note 5)
Internal clock, SHDN = FLOAT
5.5
tCONV Internal clock, SHDN = VDD
35
External clock = 2MHz, 12 clocks/conversion
6
7.5
65
µs
2 _______________________________________________________________________________________

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