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ISP1563

Hi-Speed Universal Serial Bus PCI Host Controller

Philips Electronics 

Philips Semiconductors

ISP1563

HS USB PCI Host Controller

Table 7:

Bit

2

1

0

Command register (address 04h) bit description…continued

Symbol Description

BM

Bus Master: Controls the ability of a device to act as a master on the PCI

bus.

0 — Disables the device from generating PCI accesses. State after

RST# is logic 0.

1 — Allows the device to behave as a bus master.

MS

Memory Space: Controls the response of a device to Memory Space

accesses.

0 — Disables the device response. State after RST# is logic 0.

1 — Allows the device to respond to Memory Space accesses.

IOS

I/O Space: Controls the response of a device to I/O space accesses.

0 — Disables the device response. State after RST# is logic 0.

1 — Allows the device to respond to I/O space accesses.

8.2.1.4 Status register

The Status register is a 2 B read-only register used to record status information on PCI

bus-related events. For bit allocation, see Table 8.

Table 8: Status register (address 06h) bit allocation

Bit

15

14

13

12

11

Symbol

DPE

SSE

RMA

RTA

STA

Reset

0

0

0

0

0

Access

R

R

R

R

R

Bit

7

6

5

4

3

Symbol

FBBC

reserved

66MC

CL

Reset

0

0

0

1

0

Access

R

R

R

R

R

10

9

DEVSELT[1:0]

0

1

R

R

2

1

reserved

0

0

R

R

8

MDPE

0

R

0

0

R

Table 9: Status register (address 06h) bit description

Bit Symbol Description

15

DPE

Detected Parity Error: This bit must be set by the device whenever it detects

a parity error, even if the parity error handling is disabled.

14

SSE

Signaled System Error: This bit must be set whenever the device asserts

SERR#. Devices that never assert SERR# do not need to implement this bit.

13

RMA

Received Master Abort: This bit must be set by a master device whenever

its transaction, except for Special Cycle, is terminated with Master-Abort. All

master devices must implement this bit.

9397 750 14224

Product data sheet

Rev. 01 — 14 July 2005

© Koninklijke Philips Electronics N.V. 2005. All rights reserved.

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