ISP1161A Просмотр технического описания (PDF) - Philips Electronics

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ISP1161A

Full-speed Universal Serial Bus single-chip host and device controller

Philips Electronics 

Philips Semiconductors

ISP1161A

Full-speed USB single-chip host and device controller

9397 750 13962

Product data

Table 2: Pin description for LQFP64 …continued

Symbol[1]

Pin Type Description

DACK2

INT1

28 I

29 O

DC DMA acknowledge input; when not in use, this pin must

be connected to VCC via an external 10 kΩ resistor

HC interrupt output; programmable level, edge triggered

and polarity; see Section 10.4.1

INT2

30 O

DC interrupt output; programmable level, edge triggered

and polarity; see Section 13.1.4

TEST

31 O

test output; used for test purposes only; this pin is not

connected during normal operation

RESET

32 I

reset input (Schmitt trigger); a LOW level produces an

asynchronous reset (internal pull-up resistor)

NDP_SEL

33 I

indicates to the HC software the Number of Downstream

Ports (NDP) present:

EOT

34 I

DGND

35 -

D_SUSPEND 36 O

D_WAKEUP 37 I

GL

38 O

D_VBUS

39 I

H_WAKEUP 40 I

CLKOUT

41 O

H_SUSPEND 42 O

XTAL1

43 I

XTAL2

44 O

0 — select 1 downstream port

1 — select 2 downstream ports

only changes the value of the NDP field in the

HcRhDescriptorA register; both ports will always be

enabled; see Section 10.3.1

(internal pull-up resistor)

DMA master device to inform the ISP1161A of end of DMA

transfer; active level is programmable; see Section 10.4.1

digital ground

DC ‘suspend’ state indicator output; active HIGH

DC wake-up input; generates a remote wake-up from

‘suspend’ state (active HIGH); when not in use, this pin

must be connected to DGND via an external 10 kΩ resistor

(internal pull-down resistor)

GoodLink LED indicator output (open-drain, 8 mA); the

LED is default ON, blinks OFF upon USB traffic; to connect

a LED use a series resistor of 470 Ω (VCC = 5.0 V) or

330 Ω (VCC = 3.3 V)

DC USB upstream port VBUS sensing input; when not in

use, this pin must be connected to DGND via a 1 MΩ

resistor

HC wake-up input; generates a remote wake-up from

‘suspend’ state (active HIGH); when not in use, this pin

must be connected to DGND via an external 10 kΩ resistor

(internal pull-down resistor)

programmable clock output (3 MHz to 48 MHz); default

12 MHz

HC ‘suspend’ state indicator output; active HIGH

crystal input; connected directly to a 6 MHz crystal; when

XTAL1 is connected to an external clock source, pin XTAL2

must be left open

crystal output; connected directly to a 6 MHz crystal; when

pin XTAL1 is connected to an external clock source, this

pin must be left open

Rev. 03 — 23 December 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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