ISP1161A Просмотр технического описания (PDF) - Philips Electronics

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ISP1161A

Full-speed Universal Serial Bus single-chip host and device controller

Philips Electronics 

Philips Semiconductors

ISP1161A

Full-speed USB single-chip host and device controller

Table 2: Pin description for LQFP64 …continued

Symbol[1]

Pin Type Description

DGND

45 -

digital ground

H_PSW1

46 O

power switching control output for downstream port 1;

open-drain output

H_PSW2

47 O

power switching control output for downstream port 2;

open-drain output

D_DM

48 AI/O

USB D− data line for DC upstream port; when not in use,

this pin must be left open

D_DP

49 AI/O

USB D+ data line for DC upstream port; when not in use,

this pin must be left open

H_DM1

50 AI/O USB D− data line for HC downstream port 1

H_DP1

51 AI/O USB D+ data line for HC downstream port 1

H_DM2

52 AI/O

USB D− data line for HC downstream port 2; when not in

use, this pin must be left open

H_DP2

53 AI/O

USB D+ data line for HC downstream port 2; when not in

use, this pin must be left open

H_OC1

54 I

overcurrent sensing input for HC downstream port 1

H_OC2

55 I

overcurrent sensing input for HC downstream port 2

VCC

56 -

power supply voltage input (3.0 V to 3.6 V or

4.75 V to 5.25 V). This pin connects to the internal 3.3 V

regulator input. When connected to 5 V, the internal

regulator will output 3.3 V to pins Vreg(3.3), Vhold1 and Vhold2.

When connected to 3.3 V, it will bypass the internal

regulator.

AGND

57 -

analog ground

Vreg(3.3)

58 -

internal 3.3 V regulator output; when the VCC pin is

connected to 5 V, this pin outputs 3.3 V. When the VCC pin

is connected to 3.3 V, connect this pin to 3.3 V.

A0

59 I

address input; selects command (A0 = 1) or data (A0 = 0)

A1

60 I

address input; selects AutoMux switching to DC (A1 = 1) or

AutoMux switching to HC (A1 = 0); see Table 3

n.c.

61 -

no connection

DGND

62 -

digital ground

D0

63 I/O

bit 0 of bidirectional data; slew-rate controlled; TTL input;

three-state output

D1

64 I/O

bit 1 of bidirectional data; slew-rate controlled; TTL input;

three-state output

[1] Symbol names with an overscore (e.g. NAME) represent active LOW signals.

9397 750 13962

Product data

Rev. 03 — 23 December 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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