ISP1161A Просмотр технического описания (PDF) - Philips Electronics

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ISP1161A

Full-speed Universal Serial Bus single-chip host and device controller

Philips Electronics 

Philips Semiconductors

6. Pinning information

6.1 Pinning

ISP1161A

Full-speed USB single-chip host and device controller

9397 750 13962

Product data

DGND 1

D2 2

D3 3

D4 4

D5 5

D6 6

D7 7

DGND 8

D8 9

D9 10

D10 11

D11 12

D12 13

D13 14

DGND 15

D14 16

ISP1161ABD

ISP1161ABM

48 D_DM

47 H_PSW2

46 H_PSW1

45 DGND

44 XTAL2

43 XTAL1

42 H_SUSPEND

41 CLKOUT

40 H_WAKEUP

39 D_VBUS

38 GL

37 D_WAKEUP

36 D_SUSPEND

35 DGND

34 EOT

33 NDP_SEL

004aaa085

Fig 7. Pin configuration LQFP64.

6.2 Pin description

Table 2: Pin description for LQFP64

Symbol[1]

Pin Type Description

DGND

1

-

digital ground

D2

2

I/O

bit 2 of bidirectional data; slew-rate controlled; TTL input;

three-state output

D3

3

I/O

bit 3 of bidirectional data; slew-rate controlled; TTL input;

three-state output

D4

4

I/O

bit 4 of bidirectional data; slew-rate controlled; TTL input;

three-state output

D5

5

I/O

bit 5 of bidirectional data; slew-rate controlled; TTL input;

three-state output

Rev. 03 — 23 December 2004

© Koninklijke Philips Electronics N.V. 2004. All rights reserved.

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