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IDT72V36103

3.3 VOLT CMOS SyncFIFOTM WITH BUS-MATCHING 16,384 x 36 32,768 x 36 65,536 x 36

Integrated Device Technology 

IDT72V3683/72V3693/72V36103 3.3V CMOS SyncFIFOTM WITH

BUS-MATCHING 16,384 x 36, 32,768 x 36 and 65,536 x 36

CLKB

EF/OR HIGH

CSB

W/RB

MBB

ENB

B0-B8

(Standard Mode)

OR

B0-B8

(FWFT Mode)

tENS2

tENH

tMDV

tEN

tMDV

tEN

tA

Previous Data

tA

Read 1

tA

Read 1

tA

Read 2

NOTE:

1. Unused bytes B9-B17, B18-B26, and B27-B35 are indeterminate.

COMMERCIAL TEMPERATURE RANGE

tA

Read 2

tA

Read 3

tA

Read 3

tA

Read 4

No Operation

Read 4

Read 5

tDIS

tDIS

4678 drw 12

DATA SIZE TABLE FOR BYTE READS

SIZE MODE(1)

BM

SIZE

BE

A35-A27

DATA WRITTEN TO FIFO

A26-A18

A17-A9

H

H

H

A

B

C

H

H

L

A

B

C

NOTE:

1. BE is selected at Reset: BM and SIZE must be static throughout device operation.

A8-A0

D

D

READ

NO.

1

2

3

4

1

2

3

4

DATA READ FROM FIFO

B8-B0

A

B

C

D

D

C

B

A

Figure 10. Port B Byte Read Cycle Timing (IDT Standard and FWFT Modes)

20

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