CS5360 Просмотр технического описания (PDF) - Cirrus Logic

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CS5360

24-Bit Stereo A/D Converter for Digital Audio

Cirrus Logic 

CS5360

LRCK

LEFT

RIGHT

(64X) SCLK

SDATA P0 23 22 21 20 19 18 5 4 3 2 1 0 P7 P6 P5 P4 P3 P2 P1 P0 23 22 21 20 19 18 5 4 3 2 1 0 P7 P6 P5 P4 P3 P2 P1 P0 23 22

FRAME

MASTER

24-Bit Left Justified Data

Data Valid on Rising Edge of 64x SCLK

MCLK equal to 256x Fs

SLAVE

24-Bit Left Justified Data

Data Valid on Rising Edge of SCLK

MCLK equal to 256x, 384x, or 512x Fs

Figure 8. Serial Data Format 0

LRCK

LEFT

RIGHT

(64X) SCLK

SDATA P0 23 22 21 20 19 18 5 4 3 2 1 0 P7 P6 P5 P4 P3 P2 P1 P0 23 22 21 20 19 18 5 4 3 2 1 0 P7 P6 P5 P4 P3 P2 P1 P0 23 22

FRAME

MASTER

d Data

ng Edge of 64x SCLK

6x Fs

SLAVE

24-Bit Left Justified Data

Data Valid on Falling Edge of SCLK

MCLK equal to 256x, 384x, or 512x Fs

Figure 9. Serial Data Format 1

LRCK

LEFT

RIGHT

(64X) SCLK

SDATA P0 23 22 21 20 19 18 5 4 3 2 1 0 P7 P6 P5 P4 P3 P2 P1 P0 23 22 21 20 19 18 5 4 3 2 1 0 P7 P6 P5 P4 P3 P2 P1 P0 23 22

FRAME

MASTER

I2S 24-Bit Left Justified Data

Data Valid on Rising Edge of 64x SCLK

MCLK equal to 256x Fs

SLAVE

I2S 24-Bit Left Justified Data

Data Valid on Rising Edge of SCLK

MCLK equal to 256x, 384x, or 512x Fs

Figure 10. Serial Data Format 2

10

DS280PP2

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