74F193 Просмотр технического описания (PDF) - Philips Electronics
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74F193 Datasheet PDF : 12 Pages
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Philips Semiconductors
Up/down binary counter with separate up/down clocks
Product specification
74F193
AC WAVEFORMS
For all waveforms Vm = 1.5V
CPU, CPD
1/fMAX
VM
tW(H)
tPHL
tW(L)
VM
tPLH
Qn
VM
VM
SF00750
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width and Maximum Clock Frequency
PL
VM
CPU, CPD
tW(L)
tPLH
VM VM
tPHL
VM
trec
VM
TCU, TCD, Qn
VM
VM
SF00751
Waveform 3. Parallel Pulse Width,
Parallel Load to Output Delays, and Parallel Load
to Clock Recovery Time
MR
CPU, CPD
VM
tW(H)
VM
trec
VM
TCU
tPLH
VM
tPHL
Qn, TCD
VM
SF00752
Waveform 5. Master Reset Pulse Width, Master Reset to Output
Delay and Master Reset to Clock Recovery Time
CPU, CPD
VM
VM
tPHL
tPLH
TCU, TCD
VM
VM
SF00753
Waveform 2. Propagation Delay, Clock to Terminal Count
Dn
Qn, TCU, TCD
VM
VM
tPLH
VM
tPHL
tPHL
VM
tPLH
Qn, TCU, TCD
VM
VM
SF00754
Waveform 4. Propagation Delay, Data to Flip-Flop Outputs,
Terminal Count Up and Down Outputs
Dn
VM
VM
tS(H)
tS(L)
th(H)
th(L)
PL
VM
The shaded areas indicate when the input is permitted
to change for predictable output performance.
SF00755
Waveform 6. Data Setup and Hold Times
1995 Jul 17
7
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