74F193 Просмотр технического описания (PDF) - Philips Electronics
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74F193 Datasheet PDF : 12 Pages
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Philips Semiconductors
Up/down binary counter with separate up/down clocks
Product specification
74F193
LOGIC DIAGRAM
11
PL
D0
15
D1
1
D2
10
5
CPU
CPD 4
D3
9
12
TCU
13
TCD
14
MR
J CP K
RD
SD
Q
Q
J CP
RD
SD
Q
Q
J CP K
RD
SD
Q
Q
J CP K
RD
SD
Q
Q
3
2
VCC = Pin 16
GND = Pin 8
Q0
Q1
6
7
Q1
Q1
SF00749
FUNCTION TABLE
INPUTS
OUTPUTS
OPERATING
MR
PL CPU CPD D0
D1
D2
D3
Q0
Q1
Q2
Q3 TCU TCD
MODE
H
X
X
L
X
X
X
X
L
L
L
L
H
L Reset (clear)
H
X
X
H
X
X
X
X
L
L
L
L
H
H
L
L
X
L
L
L
L
L
L
L
L
L
H
L
L
L
X
H
L
L
L
L
L
L
L
L
H
H Parallel load
L
L
L
X
H
H
H
H
H
H
H
H
L
H
L
L
H
X
H
H
H
H
H
H
H
H
H
H
L
H
↑
H
X
X
X
X
Count up
H1
H Count up
L
H
H
↑
X
X
X
X
Count down
H
H2 Count down
H = High voltage level
L = Low voltage level
X = Don’t care
↑ = Low-to-High clock transition
NOTES:
TCU=CPU at terminal count up (HHHH)
TCD=CPD at terminal count down (LLLL)
1995 Jul 17
4
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