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XRT7302IV

2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

Exar Corporation 

XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

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REV. 1.1.6

Figure 10.An Example of B3ZS Encoding ...................................................................................................... 28

HDB3 Encoding .................................................................................................................................. 28

Figure 11.An Example of HDB3 Encoding ...................................................................................................... 28

Disabling the HDB3/B3ZS Encoder ................................................................................................... 28

COMMAND REGISTER CR2-(N) ..................................................................................................... 29

2.4 THE TRANSMIT PULSE SHAPING CIRCUITRY .................................................................................... 29

Figure 12.The Bellcore GR-499-CORE Transmit Output Pulse Template for DS3 Applications .................... 29

Figure 13.The Bellcore GR-253-CORE Transmit Output Pulse Template for SONET STS-1 Applications .... 30

Enabling the Transmit Line Build-Out Circuit ..................................................................................... 30

COMMAND REGISTER CR1-(N) ..................................................................................................... 30

Disabling the Transmit Line Build-Out Circuit .................................................................................... 30

COMMAND REGISTER CR1-(N) ..................................................................................................... 31

Design Guideline for Setting the Transmit Line Build-Out Circuit ...................................................... 31

The Transmit Line Build-Out Circuit and E3 Applications .................................................................. 31

2.5 INTERFACING THE TRANSMIT SECTIONS OF THE XRT7302 TO THE LINE ........................................... 31

Figure 14.Recommended Schematic for Interfacing the Transmit Section of the XRT7302 to the Line ......... 31

TRANSFORMER VENDOR INFORMATION ........................................................................................... 32

3.0 THE RECEIVE SECTION ................................................................................................................... 32

3.1 INTERFACING THE RECEIVE SECTIONS OF THE XRT7302 TO THE LINE ............................................. 32

Figure 15.Recommended Schematic for Transformer-Coupling the Receive Section of the XRT7302 to the Line

33

Figure 16.Recommended Schematic for Capacitive-Coupling the Receive Section of the XRT7302 to the Line

33

3.2 THE RECEIVE EQUALIZER BLOCK .................................................................................................... 34

Figure 17.The Typical Application for the System Installer ............................................................................. 34

COMMAND REGISTER CR2_(N) ..................................................................................................... 35

3.3 PEAK DETECTOR AND SLICER ......................................................................................................... 35

3.4 CLOCK RECOVERY PLL .................................................................................................................. 35

The Training Mode ............................................................................................................................. 35

The Data/Clock Recovery Mode ........................................................................................................ 35

3.5 THE HDB3/B3ZS DECODER .......................................................................................................... 35

B3ZS Decoding DS3/STS-1 Applications .......................................................................................... 35

Figure 18.An Example of B3ZS Decoding ...................................................................................................... 36

HDB3 Decoding E3 Applications ........................................................................................................ 36

Figure 19.An Example of HDB3 Decoding ...................................................................................................... 36

Configuring the HDB3/B3ZS Decoder ................................................................................................ 36

COMMAND REGISTER CR2-(N) ..................................................................................................... 37

3.6 LOS DECLARATION/CLEARANCE ..................................................................................................... 37

The LOS Declaration/Clearance Criteria for E3 Applications ............................................................. 37

Figure 20.The Signal Levels at which the XRT7302 declares and clears LOS ............................................... 38

Figure 21.The Behavior the LOS Output Indicator in response to the Loss of Signal and the Restoration of Signal

38

The LOS Declaration/Clearance Criteria for DS3 and STS-1 Applications ........................................ 39

Table 5:The ALOS (Analog LOS) Declaration and Clearance Thresholds for a given setting of LOSTHR and

REQEN for DS3 and STS-1 Applications ........................................................................................... 39

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