MBM29DL32XTD/BD-80/90/12
Addresses
3rd Bus Cycle
555H
PA
t WC
t AS t AH
CE
OE
WE
Data
t CS
t CH
t GHWL
t WP t WPH
t DS
t DH
A0H
PD
Data Polling
PA
t WHWH1
DQ 7 D OUT
t RC
t CE
t OE
t OH
D OUT
Notes: 1. PA is address of the memory location to be programmed.
2. PD is data to be programmed at byte address.
3. DQ7 is the output of the complement of the data written to the device.
4. DOUT is the output of the data written to the device.
5. Figure indicates last two bus cycles out of four bus cycle sequence.
6. These waveforms are for the ×16 mode. (The addresses differ from ×8 mode.)
Figure 6 AC Waveforms for Alternate WE Controlled Program Operations
20