CS5460 Просмотр технического описания (PDF) - Cirrus Logic

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CS5460

Single Phase Bi-Directional Power/Energy IC

Cirrus Logic 

CS5460

3.1.7 Register Read/Write Command

B7 B6 B5 B4 B3 B2 B1 B0

0 W/R RA4 RA3 RA2 RA1 RA0 0

This command informs the state machine that a register access is required. On reads the addressed register is

loaded into the output buffer and clocked out by SCLK. On writes the data is clocked into the input buffer and

transferred to the addressed register on the 24th SCLK.

W/R

Write/Read control

0 = Read register

1 = Write register

RA[4:0]

Register address bits. Binary encoded 0 to 31. All registers are 24 bits in length.

Address

00000

00001

00010

00011

00100

00101

00110

00111

01000

01001

01010

01011

01100

01101

01110

01111

10000

.

.

10111

11000

11001

11010

11011

11100

.

.

11111

Name

Config

Ioff

Ign

Voff

Vgn

Cycle Count

Pulse-Rate

I

V

P

E

IRMS

VRMS

TBC

Test

Status

Res

Res

Test

Test

Mask

Test

Res

Res

Description

Configuration Register

Current offset calibration

Current gain calibration

Voltage offset calibration

Voltage gain calibration

Number of conversions to integrate over (N)

Used to calibrate/scale the energy to frequency output

Last current value

Last voltage value

Last Power value

Total energy value of last cycle

RMS current value of last cycle

RMS voltage value of last cycle

Timebase Calibration

Internal Use only †

Status register

Reserved

Reserved

Internal Use only †

Internal Use Only †

Interrupt mask register

Internal Use Only †

Reserved

Reserved

† These Registers are for Internal Use only and should not be written to. Accessing these

registers will NOT generate an “Invalid Command” (IC) bit in the Status Register.

DS279PP5

17

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