CS5460 Просмотр технического описания (PDF) - Cirrus Logic
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CS5460 Datasheet PDF : 34 Pages
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CS5460
4. REGISTER DESCRIPTION
Notes: * “RA[4:0]” => register address bits in the Register Read/Write Command word
** “default” => bit status after reset
4.1 Configuration Register
Address: RA[4:0]* = 0x00
23
22
21
20
19
18
17
16
PC3
PC2
PC1
PC0
0
0
0
Gi
15
14
13
12
EWA
PH1
PH0
SI1
11
10
9
8
SI0
EOD
DL1
DL0
7
6
5
4
3
2
1
0
RS
VHPF
IHPF
iCPU
K3
K2
K1
K0
Default** = 0x000001
K[3:0]
Clock divider. A 4 bit binary number ranging from 0 to 15 used to divide the value of MCLK to
generate the internal clock DCLK. The internal clock frequency of DCLK = MCLK/K. Valid val-
ues are 1,2, and 4.
0001 = divide by 1 (default)
0010 = divide by 2
0100 = divide by 4
iCPU
Inverts the CPUCLK clock. In order to reduce the level of noise present when analog signals
are sampled, the logic driven by CPUCLK should not be active during the sample edge.
0 = normal operation (default)
1 = minimize noise when CPUCLK is driving rising edge logic
IHPF
Control the use of the High Pass Filter on the Current Channel.
0 = High-pass filter is disabled. If VHPF is set, use all-pass filter. Otherwise, no filter is used.
(default)
1 = High-pass filter is enabled.
VHPF
Control the use of the High Pass Filter on the voltage Channel.
0 = High-pass filter is disabled. If IHPF is set, use all-pass filter. Otherwise, no filter is used.
(default)
1 = High-pass filter enabled
RS
Start a chip reset cycle when set 1. The reset cycle lasts for less than 10 XIN cycles. The bit
is automatically returned to 0 by the reset cycle.
DL0
When EOD = 1, EDIR becomes a user defined pin. DL0 sets the value of the EDIR pin.
Default = '0'
DL1
When EOD = 1, EOUT becomes a user defined pin. DL1 sets the value of the EOUT pin.
Default = '0'
EOD
Allows the EOUT and EDIR pins to be controlled by the DL0 and DL1 bits. EOUT and EDIR can
also be accessed using the status register.
0 = Normal operation of the EOUT and EDIR pins. (default)
1 = DL0 and DL1 bits control the EOUT and EDIR pins.
SI[1:0]
Soft interrupt configuration. Select the desired pin behavior for indication of an interrupt.
00 = active low level (default)
DS279PP5
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