CS5460 Просмотр технического описания (PDF) - Cirrus Logic

Номер в каталоге

Компоненты Описание

Список матч

CS5460

Single Phase Bi-Directional Power/Energy IC

Cirrus Logic 

CS5460

Therefore, the pulse rate register is programmed to

be :

PR = IR × Rv × Ri ≅ 11.574 Hz = 370 or 0x172

To improve the accuracy, either gain register can

be programmed to correct for the round-off error in

PR. This value would be calculated as

mum frequency is therefore MCLK/K/8. A timing

diagram for a multi-phase system is shown in Fig-

ure 8.

Phase - 00

t

Phase - 01

Phase - 10

t

Phase - 11

Ign

or Vgn

=

--------P----R----------

370 × 2–5

≅

1.001

=

0x401067

To allow for a simpler interface in a multi-phase

system, the EOUT and EDIR pins can be connected

together and used in a wired-or configuration. The

parts must be driven with the same clock and pro-

grammed with different phases (PH[1:0] in the

Configuration register). The pulse width and the

pulse separation is an integer multiple of system

clocks (approximately equal to 1/8 of the period of

the contents of the pulse-rate register). The maxi-

t ≅ Pulse-Rate Register Period =

N

for Integer N

8

MCLK/K

Figure 8. Multi-Phase System

DS279PP5

13

Share Link: