DESCRIPTION
The WED9LAPC2C16V4BC is a 3.3V, 512K x 32 Synchronous Pipeline SRAM and a 512K x 64 Synchronous DRAM array packaged in a 21mm x 21mm 192 lead BGA.
The WED9LAPC2C16V4BC provides the memory required for the CRAM (Control Memory) and VCRAM (Virtual Connection Memory) memory ports for Lucent’s LUCTAPC640 ATM port controller. When used in conjunction with the WED9LAPC2B16P8BC, which provides memory for the BRAM (Buffer Memory) and PRAM (Pointer Memory) memory ports, the entire memory requirement of the LUCTAPC640 can be met using these 2 BGA devices.
The WED9LAPC2C16V4BC is 100% tested to the timing requirements of the LUCTAPC640’s memory interface timing for both Commercial and Industrial temperature ranges.

FEATURES
■ Clock speeds:
   • SSRAM: 100 MHz
   • SDRAM: 100 MHz
■ 100% tested to timing requirements of LUCTAPC640’s memory interface
■ Packaging:
   • 192 pin BGA, 21mm x 21mm
■ 3.3V Operating supply voltage
■ Direct control interface to both the CRAM and VCRAM ports on the LUCTAPC640
■ 62% space savings vs. monolithic solution
■ Reduced system inductance and capacitance