CP555 Даташит - Central Semiconductor
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CP555
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2 Pages
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производитель
Central Semiconductor
PROCESS DETAILS
Process EPITAXIAL PLANAR
Die Size 15 x 10 MILS
Die Thickness 8.0 MILS
Base Bonding Pad Area 3.6 x 2.4 MILS
Emitter Bonding Pad Area 3.6 x 2.4 MILS
Top Side Metalization Al - 20,000Å
Back Side Metalization Au - 15,000Å
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Компоненты Описание
PDF
производитель
Small Signal Transistor PNP- Saturated Switch Transistor Chip
Central Semiconductor Corp
Small Signal Transistor NPN - Saturated Switch Transistor Chip ( Rev : 2002 )
Central Semiconductor
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