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MAS3507D

MPEG 1/2 Layer 2/3 Audio Decoder

Micronas 

MAS 3507D

PRELIMINARY DATA SHEET

1.2. Application Overview

The MAS 3507D can be applied in two major environ-

ments: in multimedia mode or in broadcast mode. For

both modes, the DAC 3550A fits perfectly to the

requirements of the MAS 3507D. It is a high-quality

multi sample rate DAC (8 kHz ... 50 kHz) with internal

crystal oscillator, which is only needed for generating

the decoder clock, and integrated stereo headphone

amplifier plus 2 stereo inputs.

1.2.1. Multimedia Mode

In a memory-based multimedia environment, the easi-

est way to incorporate a MAS 3507D decoder is to use

its data-demand pin. This pin can be used directly to

request input bit stream data from the host or memory

system.

While the demand pin is active, the data stream shall

be transmitted to the MAS 3507D. The bit stream clock

should be higher than the actual data rate of the

MPEG bit stream (1 MHz bit stream clock works with

all MPEG bit rates). The demand signal will be active

until the input buffer of the MAS 3507D is filled.

A delayed response of the host to the demand signal

(by several milliseconds) or an interrupted response of

the host will be tolerated by the MAS 3507D as long as

the input buffer does not run empty. A PC might use its

DMA capabilities to transfer the data in the background

to the MAS 3507D without interfering with its fore-

ground processes.

The source of the bit stream may be a memory (e.g.

ROM, Flash) or PC peripherals, such as CD-ROM

drive, an ISDN card, a hard disk or a floppy disk drive.

1.2.2. Broadcast Mode

In environments where the bit stream is delivered from

an independent transmitter to one or more receivers,

the MAS 3507D cannot act as master for the bit

stream clock. In this mode, it synchronizes itself to the

incoming bit stream data rate by a digital PLL and gen-

erates a synchronized digital audio sample clock for

the required output sample rates.

Host

(PC, Controller)

I2C

14.725 MHz

demand signal

demand clock

I2S

MAS 3507D

DAC

3550A

MPEG bit stream

line out

ROM, CD-ROM,

RAM, Flash Mem. ..

CLKI

CLKOUT

Fig. 1–2: Block diagram of a MAS 3507D, decoding a stored bit stream in multimedia mode

Receiver

Front-end

control I2C

L3 bit stream

(fixed rate)

clock

I2S

MAS 3507D

14.725 MHz

DAC

3550A

line out

CLKI

CLKOUT

Fig. 1–3: Block diagram of a MAS 3507D in a broadcast environment

6

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