PI6C180V(2001) Просмотр технического описания (PDF) - Pericom Semiconductor
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PI6C180V Datasheet PDF : 7 Pages
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PI6C180
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Product Pin Description
Pin
Symbol
Type
Qty
Description
4,5,8,9
SDRAM[0-3]
O
4 SDRAM Byte 0 clock output
13,14,17,18 SDRAM[4-7]
O
4 SDRAM Byte 1 clock output
31,32,35,36 SDRAM[8-11]
O
4 SDRAM Byte 2 clock output
40,41,44,45 SDRAM[12-15]
O
4 SDRAM Byte 3 clock output
21,28
SDRAM[16-17]
O
4 SDRAM clock outputs usable for feedback
11
BUF_IN
I
1 Input for 1-18 buffer
38
OE
I
1
Hi-Z all outputs when held LOW. Has a >100kΩ internal
pull-up resistor
24
SDATA
I/O
1
Data pin for I2C circuitry. Has a >100kΩ internal pull-up resistor
25
SCLOCK
I/O
1 Clock pin I2C circuitry. Has a >100kΩ internal pull-up resistor
3,7,12,16,20,
29,33,37,42,46
VDD[0-9]
Power
10 3.3V power supply for SDRAM buffers
6,10,15,19,22,
27,30,34,39,43
VSS[0-9]
23
VDDIIC
26
VSSIIC
1,2,47,48
NC
Ground
Power
Ground
Reserved
10 Ground for SDRAM buffers
1 3.3V power supply for I2C circuitry
1 Ground for I2C circuitry
4 Reserved for future modification. No connects
OE Functionality
OE SDRAM[0-17] Note
0
Hi-Z
1
1
BUF_IN
2
Notes:
1. Used for test purposes only
2. Buffers are non-inverting
PI6C180 I2C Address Assignment
A6 A5 A4 A3 A2 A1 A0 R/W
110 10 0 1 0
PI6C180 Serial Configuration Map
Byte0: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Bit Pin # Description
Bit 7
18
SDRAM7
(Active/Inactive)
Bit 6
17
SDRAM6
(Active/Inactive)
Bit 5
14
SDRAM5
(Active/Inactive)
Bit 4
13
SDRAM4
(Active/Inactive)
Bit 3
9
SDRAM3
(Active/Inactive)
Bit 2
8
SDRAM2
(Active/Inactive)
Bit 1
5
SDRAM1
(Active/Inactive)
Bit 0
4
SDRAM0
(Active/Inactive)
Note:
Inactive means outputs are
held LOW and are disabled
from switching.
2
PS8141C 01/18/01
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