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PI6C180V(2001) Просмотр технического описания (PDF) - Pericom Semiconductor

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PI6C180V
(Rev.:2001)
Pericom-Semiconductor
Pericom Semiconductor Pericom-Semiconductor
PI6C180V Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
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Precision 1-18 Clock Buffer
Product Features
High-speed, to 125 MHz (PI6C180A)
Low-noise non-inverting 1-18 buffer
Supports up to four SDRAM DIMMs
Low skew (< 250ps) between any two output clocks
I2C Serial Configuration interface
Multiple VDD, VSS pins for noise reduction
3.3V power supply voltage
Separate Hi-Z pin for testing
48-pin SSOP package (V)
Logic Block Diagram
Description
The PI6C180 is a high-speed low-noise 1-18 noninverting buffer
designed for SDRAM clock buffer applications.
PI6C180 can operate up to 100 MHz, whereas PI6C180A is rated at
125 MHz.
At power up all SDRAM output are enabled and active. The I2C
Serial control may be used to individually activate/deactivate any
of the 18 output drivers.
The output enable (OE) pin may be pulled low to put all outputs in a
Hi-Z state.
Note:
Purchase of I2C components from Pericom conveys a license to
use them in an I2C system as defined by Philips.
Product Pin Configuration
BUF_IN
OE
SDATA
SCLOCK
I2C
I/O
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM17
NC 1
48 NC
NC 2
47 NC
VDD0 3
SDRAM0 4
46 VDD9
45 SDRAM15
SDRAM1 5
44 SDRAM14
VSS0 6
VDD1 7
SDRAM2 8
43 VSS9
42 VDD8
41 SDRAM13
SDRAM3 9
40 SDRAM12
VSS1 10 48-Pin 39 VSS8
BUF_IN 11 V 38 OE
VDD2 12
SDRAM4 13
37 VDD7
36 SDRAM11
SDRAM5 14
35 SDRAM10
VSS2 15
VDD3 16
SDRAM6 17
34 VSS7
33 VDD6
32 SDRAM9
SDRAM7 18
31 SDRAM8
VSS3 19
VDD4 20
SDRAM16 21
30 VSS6
29 VDD5
28 SDRAM17
VSS4 22
VDDIIC 23
SDATA 24
27 VSS5
26 VSSIIC
25 SCLOCK
1
PS8141C 01/18/01

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