HD6433024F Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HD6433024F

Hitachi Single-Chip Microcomputer

Hitachi -> Renesas Electronics 

2.8.7 Power-Down State ................................................................................................ 53

2.9 Basic Operational Timing .................................................................................................. 53

2.9.1 Overview ............................................................................................................... 53

2.9.2 On-Chip Memory Access Timing ......................................................................... 53

2.9.3 On-Chip Supporting Module Access Timing........................................................ 54

2.9.4 Access to External Address Space ........................................................................ 55

Section 3 MCU Operating Modes ................................................................................. 57

3.1 Overview ............................................................................................................................ 57

3.1.1 Operating Mode Selection .................................................................................... 57

3.1.2 Register Configuration .......................................................................................... 58

3.2 Mode Control Register (MDCR)........................................................................................ 58

3.3 System Control Register (SYSCR) .................................................................................... 59

3.4 Operating Mode Descriptions ............................................................................................ 61

3.4.1 Mode 1 .................................................................................................................. 61

3.4.2 Mode 2 .................................................................................................................. 61

3.4.3 Mode 3 .................................................................................................................. 62

3.4.4 Mode 4 .................................................................................................................. 62

3.4.5 Mode 5 .................................................................................................................. 62

3.4.6 Mode 6 .................................................................................................................. 62

3.4.7 Mode 7 .................................................................................................................. 62

3.5 Pin Functions in Each Operating Mode.............................................................................. 63

3.6 Memory Map in Each Operating Mode.............................................................................. 64

3.6.1 Comparison of H8/3024 Series Memory Maps .................................................... 64

3.6.2 Reserved Areas...................................................................................................... 64

Section 4 Exception Handling ........................................................................................ 69

4.1 Overview ............................................................................................................................ 69

4.1.1 Exception Handling Types and Priority................................................................ 69

4.1.2 Exception Handling Operation.............................................................................. 69

4.1.3 Exception Vector Table ........................................................................................ 70

4.2 Reset ................................................................................................................................... 72

4.2.1 Overview ............................................................................................................... 72

4.2.2 Reset Sequence...................................................................................................... 72

4.2.3 Interrupts after Reset ............................................................................................. 75

4.3 Interrupts ............................................................................................................................ 76

4.4 Trap Instruction .................................................................................................................. 76

4.5 Stack Status after Exception Handling ............................................................................... 77

4.6 Notes on Stack Usage......................................................................................................... 78

Section 5 Interrupt Controller ......................................................................................... 81

5.1 Overview ............................................................................................................................ 81

5.1.1 Features ................................................................................................................. 81

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