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HD6433024F Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

Номер в каталоге
Компоненты Описание
Список матч
HD6433024F
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD6433024F Datasheet PDF : 824 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Contents
Section 1 Overview............................................................................................................ 1
1.1 Overview ............................................................................................................................ 1
1.2 Block Diagram.................................................................................................................... 6
1.3 Pin Description ................................................................................................................... 7
1.3.1 Pin Arrangement ................................................................................................... 7
1.3.2 Pin Functions......................................................................................................... 10
1.3.3 Pin Assignments in Each Mode ............................................................................ 14
1.4 Caution on Crystal Resonator Connection ......................................................................... 18
Section 2 CPU...................................................................................................................... 19
2.1 Overview ............................................................................................................................ 19
2.1.1 Features ................................................................................................................. 19
2.1.2 Differences from H8/300 CPU.............................................................................. 20
2.2 CPU Operating Modes ....................................................................................................... 20
2.3 Address Space .................................................................................................................... 21
2.4 Register Configuration ....................................................................................................... 22
2.4.1 Overview ............................................................................................................... 22
2.4.2 General Registers .................................................................................................. 23
2.4.3 Control Registers................................................................................................... 24
2.4.4 Initial CPU Register Values .................................................................................. 25
2.5 Data Formats ...................................................................................................................... 26
2.5.1 General Register Data Formats ............................................................................. 26
2.5.2 Memory Data Formats .......................................................................................... 27
2.6 Instruction Set .................................................................................................................... 29
2.6.1 Instruction Set Overview ...................................................................................... 29
2.6.2 Instructions and Addressing Modes ...................................................................... 30
2.6.3 Tables of Instructions Classified by Function....................................................... 31
2.6.4 Basic Instruction Formats...................................................................................... 40
2.6.5 Notes on Use of Bit Manipulation Instructions..................................................... 41
2.7 Addressing Modes and Effective Address Calculation...................................................... 43
2.7.1 Addressing Modes................................................................................................. 43
2.7.2 Effective Address Calculation............................................................................... 45
2.8 Processing States ................................................................................................................ 49
2.8.1 Overview ............................................................................................................... 49
2.8.2 Program Execution State ....................................................................................... 49
2.8.3 Exception-Handling State ..................................................................................... 50
2.8.4 Exception Handling Operation.............................................................................. 51
2.8.5 Bus-Released State................................................................................................ 52
2.8.6 Reset State ............................................................................................................. 52
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