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VG36128161BT

CMOS Synchronous Dynamic RAM

Vanguard International Semiconductor  

VIS

VG36128401BT / VG36128801BT / VG36128161BT

CMOS Synchronous Dynamic RAM

2. Truth Table

2.1 Command Truth Table

FUNCTION

Device deselect

No operation

Mode register set

Bank activate

Read

Read with auto precharge

Write

Write with auto precharge

Precharge select bank

Precharge all banks

Burst stop

CBR (Auto) refresh

Self refresh

Symbol

DESL

NOP

MRS

ACT

READ

READA

WRIT

WRITA

PRE

PALL

BST

REF

SELF

CKE

n-1 n

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

X

H

H

H

L

CS RAS CAS WE BA

H

X

X

X

X

L

H

H

H

X

L

L

L

L

L

L

L

H

H

V

L

H

L

H

V

L

H

L

H

V

L

H

L

L

V

L

H

L

L

V

L

L

H

L

V

L

L

H

L

X

L

H

H

L

X

L

L

L

H

X

L

L

L

H

X

A11

A10 A9 - A0

X

X

X

X

L

V

V

V

L

V

H

V

L

V

H

V

L

X

H

X

X

X

X

X

X

X

2.2 DQM Truth Table

FUNCTION

Data write/output enable

Data mask/output disable

Symbol

ENB

MASK

CKE

n-1

n-1

H

X

H

X

DQM

L

H

2.3 CKE Truth Table

Current State

Activating

Any

Clock suspend

Idle

Idle

Self refresh

Function

Clock suspend mode entry

Clock suspend

Clock suspend mode exit

CBR refresh command

Self refresh entry

Self refresh exit

Idle

Power down

Power down entry

Power down exit

Symbol

REF

SELF

CKE

n-1 n

H

L

L

L

L

H

H

H

H

L

L

H

L

H

H

L

L

H

CS RAS CAS WE

XX

X

X

XX

X

X

XX

X

X

L

L

L

H

L

L

L

H

L

H

H

H

HX

X

X

XX

X

X

XX

X

X

Add -

ress

X

X

X

X

X

X

X

X

X

H : High level, L : Low level

X : High or Low level (Don’t care), V : Valid Data input

Document :1G5-0183

Rev.1

Page 10

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