FM25V01A Просмотр технического описания (PDF) - Cypress Semiconductor

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FM25V01A

128-Kbit (16K × 8) Serial (SPI) F-RAM

Cypress Semiconductor 

FM25V01A

Maximum Ratings

Exceeding maximum ratings may shorten the useful life of the

device. These user guidelines are not tested.

Storage temperature ............................... –55 C to + 125 C

Maximum accumulated storage time

At 125 °C ambient temperature ................................. 1000 h

At 85 °C ambient temperature ................................ 10 Years

Ambient temperature

with power applied ................................... –55 °C to +125 °C

Supply voltage on VDD relative to VSS ........–1.0 V to + 4.5 V

Input voltage ........... –1.0 V to +4.5 V and VIN < VDD + 1.0 V

DC voltage applied to outputs

in HI-Z state ........................................ –0.5 V to VDD + 0.5 V

Transient voltage (< 20 ns) on

any pin to ground potential ................. –2.0 V to VDD + 2.0 V

Package power dissipation

capability (TA = 25 °C) ................................................. 1.0 W

Surface mount lead soldering

temperature (3 seconds) ........................................ + 260 C

DC output current (1 output at a time, 1-s duration) ... 15 mA

Electrostatic discharge voltage

Human Body Model (JEDEC Std JESD22-A114-B) ................ 2 kV

Charged Device Model (JEDEC Std JESD22-C101-A)........... 500 V

Latch-up current .................................................... > 140 mA

Operating Range

Range

Industrial

Ambient Temperature

(TA)

VDD

–40 C to +85 C 2.0 V to 3.6 V

DC Electrical Characteristics

Over the Operating Range

Parameter

Description

Test Conditions

Min

VDD

Power supply

2.0

IDD

VDD supply current

SCK toggling between VDD – fSCK = 40 MHz

–

0.2 V and VSS, other inputs VSS

or VDD – 0.2 V. SO = Open.

fSCK

=

1

MHz

–

ISB

VDD standby current

CS = VDD. All other inputs VSS or VDD.

–

IZZ

Sleep mode current

CS = VDD. All other inputs VSS or VDD.

–

ILI

Input leakage current VSS < VIN < VDD

–1

(Except HOLD)

Input leakage current

(for HOLD)

–100

ILO

VIH

VIL

VOH1

VOH2

VOL1

VOL2

Rin[4]

Output leakage current VSS < VOUT < VDD

Input HIGH voltage

Input LOW voltage

Output HIGH voltage IOH = –1 mA, VDD = 2.7 V.

Output HIGH voltage IOH = –100 A

Output LOW voltage

IOL = 2 mA, VDD = 2.7 V

Output LOW voltage

IOL = 150 A

Input resistance (HOLD) For VIN = VIL(max)

For VIN = VIH(min)

–1

0.7 × VDD

– 0.3

2.4

VDD – 0.2

–

–

800

30

Typ [3]

3.3

–

–

90

5

–

–

–

–

–

–

–

–

–

–

–

Max Unit

3.6

V

2.5

mA

0.22

mA

150

A

8

A

+1

A

+1

A

+1

A

VDD + 0.3 V

0.3 × VDD V

–

V

–

V

0.4

V

0.2

V

–

k

–

k

Notes

3. Typical values are at 25 °C, VDD = VDD(typ). Not 100% tested.

4. The input pull-up circuit is strong (30 k) when the input voltage is above VIH and weak (800 k) when the input voltage is below VIL.

Document Number: 001-90881 Rev. *E

Page 13 of 22

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