FM25V01A Просмотр технического описания (PDF) - Cypress Semiconductor

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FM25V01A

128-Kbit (16K × 8) Serial (SPI) F-RAM

Cypress Semiconductor 

FM25V01A

Endurance

The FM25V01A devices are capable of being accessed at least

1014 times, reads or writes. An F-RAM memory operates with a

read and restore mechanism. Therefore, an endurance cycle is

applied on a row basis for each access (read or write) to the

memory array. The F-RAM architecture is based on an array of

rows and columns of 2K rows of 64-bits each. The entire row is

internally accessed once whether a single byte or all eight bytes

are read or written. Each byte in the row is counted only once in

an endurance calculation. Table 7 shows endurance calculations

for a 64-byte repeating loop, which includes an opcode, a starting

address, and a sequential 64-byte data stream. This causes

each byte to experience one endurance cycle through the loop.

Table 7. Time to Reach Endurance Limit for Repeating

64-byte Loop

SCK Freq

(MHz)

40

20

10

5

Endurance

Cycles/sec

74,620

37,310

18,660

9,330

Endurance

Cycles/year

2.35 × 1012

1.18 × 1012

5.88 × 1011

2.94 × 1011

Years to Reach

Limit

42.6

85.1

170.2

340.3

Document Number: 001-90881 Rev. *E

Page 12 of 22

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