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RT5370N

CMOS Technology with PA, LNA, RF, Baseband, and MAC Integrated

Unspecified 

RT5370

iiiiiii

Datasheet

Revision August 30, 2010

Table of Content

1. PIN LAYOUT....................................................................................................................................................................... 1

1.1 PIN LAYOUT ................................................................................................................................................................. 1

1.2 PIN DESCRIPTION ........................................................................................................................................................ 2

1.3 STRAPPING PIN............................................................................................................................................................ 3

2 MAXIMUM RATINGS AND OPERATING CONDITIONS ....................................................................................................... 4

2.1 ABSOLUTE MAXIMUM RATINGS ................................................................................................................................. 4

2.2 THERMAL INFORMATION............................................................................................................................................ 4

2.3 OPERATING CONDITIONS............................................................................................................................................ 4

2.4 STORAGE CONDITION ................................................................................................................................................. 4

2.5 DC ELECTRICAL CHARACTERISTICS .............................................................................................................................. 4

2.6 AC ELECTRICAL CHARACTERISTICS .............................................................................................................................. 5

2.6.1 RF RECEIVER ........................................................................................................................................................ 5

2.6.2 RF TRANSMITTER................................................................................................................................................. 5

3 REGISTER MAP .................................................................................................................................................................. 6

3.1 SCH/DMA REGISTERS .................................................................................................................................................. 7

3.2 PBF REGISTERS .......................................................................................................................................................... 13

3.3 TEST REGISTERS......................................................................................................................................................... 18

3.4 MAC REGISTERS......................................................................................................................................................... 24

3.4.1 MAC SYSTEM CONFIGURATION REGISTERS (OFFSET:0X1000).......................................................................... 24

3.4.2 MAC TIMING CONTROL REGISTERS (OFFSET:0X1100) ...................................................................................... 32

3.4.3 MAC POWER SAVE CONFIGURATION REGISTERS (OFFSET:0X1200) ................................................................. 36

3.4.4 MAC TX CONFIGURATION REGISTERS (OFFSET: 0X1300).................................................................................. 37

3.4.5 MAC RX CONFIGURATION REGISTERS (OFFSET: 0X1400).................................................................................. 47

3.4.6 MAC SECURITY CONFIGURATION REGISTERS (OFFSET:0X1500) ....................................................................... 49

3.4.7 MAC HCCA/PSMP CSR (OFFSET:0X1600)........................................................................................................... 49

3.4.8 MAC STATISTIC COUNTERS (OFFSET:0X1700) ................................................................................................... 51

3.5 MAC SEARCH TABLE (OFFSET: 0X1800).................................................................................................................... 56

3.6 SECURITY TABLE/CIS/BEACON/NULL FRAME (OFFSET: 0X4000)............................................................................... 57

3.6.1 SECURITY ENTRY FORMAT................................................................................................................................. 57

3.6.2 SECURITY TABLE ................................................................................................................................................ 58

4 DESCRIPTOR AND WIRELESS INFORMATION .................................................................................................................. 62

4.1TXINF.......................................................................................................................................................................... 62

4.2TXWI FORMAT............................................................................................................................................................ 62

4.3 RXWI FORMAT........................................................................................................................................................... 64

4.4 BRIEF PHY RATE FORMAT AND DEFINITION.............................................................................................................. 64

5 PACKAGE INFORMATION ................................................................................................................................................ 66

6 REVISION HISTORY .......................................................................................................................................................... 68

DSRT5370_V1.0_083010

Form No.：QS-073-F02

Rev.：1

- i-

Kept by： DCC

Ret. Time： 5 Years

Draft

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