CY7C1480BV33 Просмотр технического описания (PDF) - Cypress Semiconductor

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CY7C1480BV33

72-Mbit (2 M × 36/4 M × 18/1 M × 72) Pipelined Sync SRAM

Cypress Semiconductor 

CY7C1480BV33, CY7C1482BV33, CY7C1486BV33

Contents

Pin Configurations ........................................................... 5

Pin Definitions .................................................................. 8

Functional Overview ........................................................ 9

Single Read Accesses ................................................ 9

Single Write Accesses Initiated by ADSP ................... 9

Single Write Accesses Initiated by ADSC ................. 10

Burst Sequences ....................................................... 10

Sleep Mode ............................................................... 10

Interleaved Burst Address Table

(MODE = Floating or VDD) ............................................. 10

Linear Burst Address Table (MODE = GND) ................ 10

ZZ Mode Electrical Characteristics ............................... 10

Truth Table ...................................................................... 11

Truth Table for Read/Write ............................................ 12

Truth Table for Read/Write ............................................ 12

Truth Table for Read/Write ............................................ 12

IEEE 1149.1 Serial Boundary Scan (JTAG) .................. 13

Disabling the JTAG Feature ...................................... 13

Test Access Port (TAP) ............................................. 13

PERFORMING A TAP RESET .................................. 13

TAP REGISTERS ...................................................... 13

TAP Instruction Set ................................................... 14

TAP Controller State Diagram ....................................... 15

TAP Controller Block Diagram ...................................... 16

3.3-V TAP AC Test Conditions ...................................... 17

3.3-V TAP AC Output Load Equivalent ......................... 17

2.5-V TAP AC Test Conditions ...................................... 17

2.5-V TAP AC Output Load Equivalent ......................... 17

TAP DC Electrical Characteristics

and Operating Conditions ............................................. 17

TAP AC Switching Characteristics ............................... 18

TAP Timing ...................................................................... 18

Identification Register Definitions ................................ 19

Scan Register Sizes ....................................................... 19

Identification Codes ....................................................... 19

Boundary Scan Exit Order (2 M × 36) ........................... 20

Boundary Scan Exit Order (4 M × 18) ........................... 20

Boundary Scan Exit Order (1 M × 72) ........................... 21

Maximum Ratings ........................................................... 22

Operating Range ............................................................. 22

Electrical Characteristics ............................................... 22

Capacitance .................................................................... 23

Thermal Resistance ........................................................ 23

Switching Characteristics .............................................. 25

Switching Waveforms .................................................... 26

Ordering Information ...................................................... 30

Ordering Code Definitions ......................................... 30

Package Diagrams .......................................................... 31

Reference Information ................................................... 34

Acronyms .................................................................. 34

Document Conventions ............................................. 34

Document History Page ................................................. 35

Sales, Solutions, and Legal Information ...................... 36

Worldwide Sales and Design Support ....................... 36

Products .................................................................... 36

PSoC Solutions ......................................................... 36

Document Number: 001-15145 Rev. *F

Page 4 of 36

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