PSB 4595 / PSB 4596
Analog Line Interface Solution
Configuration Overview
125 µS
FSC
DAT_CLK
DAT_IN
151413121110 9 8 7 6 5 4 3 2 1 0
DAT_OUT
151413121110 9 8 7 6 5 4 3 2 1 0
tStart
tVoice
tStop
Figure 16 Example of a Clock Rate higher than 128 kb/s
The data package must stay within the frame, tStart > 0 and tStop > 0.
The FSC signal can be generated externally by the host or by ALIS.
Semiconductor Group
29
Data Sheet 06.98