PSB 4595 / PSB 4596
Analog Line Interface Solution
Configuration Overview
- Two transistors (T1, T2) to handle the line current. T2 must be of depletion type, in order
to deal with start-up. Recommended transistors: T1: SIEMENS BSP 88; T2: SIEMENS
BSP 129.
- Components for EMC protection: not shown, as they depend on the board layout.
ALIS-D can optionally be connected to the tip/ring to provide Caller ID functions. The CID
circuit requires two capacitors and four resistors.
5.2 Host Interface
The host interface consists of a serial µ-controller interface and a 16-bit linear data
interface. They are used to connect ALIS either to a µ-controller and or to a data pump.
The two serial interfaces can be accessed on two separate serial ports or in time-
multiplex (MUX) mode on a single serial port.
5.2.1 The µ-Controller Interface
The ALIS internal configuration registers, the auxiliary ports, and the Coefficient RAM
(CRAM) are programmable via the serial µ-controller interface. This interface consists of
four pins:
CS:
Chip select, to enable interface (active low)
DCLK:
Clock, 1 kHz to 1024 kHz
DIN:
Data input
DOUT:
Data output
CS is used to start serial access to the ALIS registers and the Coefficient RAM. Following
a CS falling edge, the first eight bits received at DIN specify the command. Subsequent
data bytes (the number depends on the command) are stored in the selected
configuration registers or the selected part of the CRAM.
Serial interface specification: 8 bit, no parity, no start/stop bit. Every command must
begin with a CS falling edge.
Semiconductor Group
26
Data Sheet 06.98