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PHB66NQ03LT Datasheet PDF : 13 Pages
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NXP Semiconductors
PHB66NQ03LT
N-channel TrenchMOS logic level FET
4. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDS
VDGR
VGS
ID
drain-source voltage
drain-gate voltage
gate-source voltage
drain current
Tj ≥ 25 °C; Tj ≤ 175 °C
Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ
VGS = 10 V; Tmb = 100 °C
VGS = 5 V; Tmb = 100 °C; see Figure 1
VGS = 5 V; Tmb = 25 °C; see Figure 1;
see Figure 3
IDM
peak drain current
Ptot
total power dissipation
Tstg
storage temperature
Tj
junction temperature
Source-drain diode
VGS = 10 V; Tmb = 25 °C
tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3
Tmb = 25 °C; see Figure 2
IS
source current
ISM
peak source current
Avalanche ruggedness
Tmb = 25 °C
tp ≤ 10 µs; pulsed; Tmb = 25 °C
EDS(AL)S
non-repetitive
VGS = 10 V; Tj(init) = 25 °C; ID = 43 A; Vsup ≤ 25 V;
drain-source avalanche unclamped; tp = 0.15 ms; RGS = 50 Ω
energy
Min Max Unit
-
25
V
-
25
V
-20 20
V
-
45
A
-
40
A
-
57
A
-
66
A
-
228 A
-
93
W
-55 175 °C
-55 175 °C
-
57
A
-
228 A
-
90
mJ
PHB66NQ03LT_7
Product data sheet
Rev. 07 — 30 January 2009
© NXP B.V. 2009. All rights reserved.
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