IDT29FCT52A Просмотр технического описания (PDF) - Integrated Device Technology
Номер в каталоге
Компоненты Описание
Список матч
IDT29FCT52A Datasheet PDF : 7 Pages
| |||
IDT29FCT52A/B/C, IDT29FCT53A/B/C
FAST CMOS OCTAL REGISTERED TRANSCEIVERS
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
B7
B6
B5
B4
B3
B2
B1
B0
OEB
CPA
CEA
GND
1
24
2
23
3
22
4 P24-1, 21
5 D24-1, 20
6
E24-1
&
19
7 SO24-2 18
8
17
9
16
10
15
11
14
12
13
Vcc
A7
A6
A5
A4
A3
A2
A1
A0
OEA
CPB
CEB
INDEX
4 3 2 28 27 26
B4 5
B3 6
1
25 A5
24 A4
B2 7
23 A3
NC 8
L28-1
22 NC
B1 9
21 A2
B0 10
20 A1
OEB
11
19 A0
12 13 14 15 16 17 18
DIP/CERPACK/SOIC
TOP VIEW
LCC
TOP VIEW
2533 drw 02
PIN DESCRIPTION
Name I/O
Description
A0-7
I/O
Eight bidirectional lines carrying the A Register inputs or B Register outputs.
B0-7
I/O
Eight bidirectional lines carrying the B Register inputs or A Register outputs.
CPA
I
Clock for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH transition
of the CPA signal.
CEA
I
Clock Enable for the A Register. When CEA is LOW, data is entered into the A Register on the LOW-to-HIGH
transition of the CPA signal. When CEA is HIGH, the A Register holds its contents, regardless of CPA signal
transitions.
OEB
I
Output Enable for the A Register. When OEB is LOW, the A Register outputs are enabled onto the B0-7 lines. When
OEB is HIGH, the B0-7 outputs are in the high-impedance state.
CPB
I
Clock for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH transition
of the CPB signal.
CEB
I
Clock Enable for the B Register. When CEB is LOW, data is entered into the B Register on the LOW-to-HIGH
transition of the CPB signal. When CEB is HIGH, the B Register holds its contents, regardless of CPB signal
transitions.
OEA
I
Output Enable for the B Register. When OEA is LOW, the B Register outputs are enabled onto the A0-7 lines. When
OEA is HIGH, the A0-7 outputs are in the high-impedance state.
2533 tbl 01
REGISTER FUNCTION TABLE(1)
(Applies to A or B Register)
Inputs
Internal
D
CP
CE
Q
X
X
H
NC
L
↑
L
L
H
↑
L
H
Function
Hold Data
Load Data
2533 tbl 02
OUTPUT CONTROL(1)
Internal
Y-Outputs
OE
Q
52
53
H
X
Z
Z
L
L
L
H
L
H
H
L
NOTE:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
NC = No Change
↑ = LOW-to-HIGH Transition
Function
Disable Outputs
Enable Outputs
2533 tbl 03
7.1
2
Share Link: 